Table 102. Dac Control Register Register - DAC_CTRL (00h)
7
6
5
4
3
2
1
0
ONPADRV ONAUXIN
ONDACR
ONDACL
ONLNOR
ONLNOL
ONLNIR
ONLNIL
Bit
Bit
Description
Number
Mnemonic
Differential mono PA driver
7
6
5
4
3
2
1
0
ONPADRV
ONAUXIN
ONDACR
ONDACL
ONLNOR
ONLNOL
ONLNIR
Clear to power down. Set to power up.
Differential mono auxiliary input amplifier
Clear to power down. Set to power up.
Right channel DAC
Clear to power down. Set to power up.
Left channel DAC
Clear to power down. Set to power up.
Right channel line out driver
Clear to power down. Set to power up.
Left channel line out driver
Clear to power down. Set to power up.
Right channel line in amplifier
Clear to power down. Set to power up.
Left channel line in amplifier
ONLNIL
Clear to power down. Set to power up.
Reset Value = 00000000b
Table 103. DAC Left Line In Gain Register - DAC_LLIG (01h)
7
6
5
4
3
2
1
0
-
-
-
LLIG4
LLIG3
LLIG2
LLIG1
LLIG0
Bit
Bit
Description
Number
7:5
Mnemonic
-
Not used
4:0
LLIG 4:0
Left channel line in analog gain selector
Reset Value = 00000101b
92
AT8xC51SND2C
4341D–MP3–04/05
ATMEL [ ATMEL ]
