AS3525-A/-B C22O22
Data Sheet, Confidential
7.3.11 NAND Flash Interface
The NAND FLASH interface module enables control of NAND flash devices. The design follows the hardware reference implementation described
in SMIL (SmartMediaTM Interface Library), Hardware Edition 1.00, TOSHIBA Corporation, but has extensions to support the latest generation of
NAND flash devices.
Programming and Reading can be done either by direct access to/from data register (normal mode) or by using a FIFO (burst mode). NAF supports
8-bit and 16-bit transfers.
Features
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interface compliant to AMBA APB bus
generation of interrupt request signal with several maskable interrupt sources (ready, empty, almost_empty…)
hardware error detection (2 detect, 1 correct per 256 bytes block) for up to 8 *256 bytes (up to 24 ECC bytes)
8-bit and 16-bit transfer Mode fore X8/X16 devices
big endian / little endian support
DMA Mode
Normal Mode
Data/Mode/Status Register
write/read on/from data register automatically generates read/write strobes
Burst Transfer
36 x 32 bit FIFO for DMA/burst support
read- & write controller for automatic data resizing (32bit <=> 8/16bit) and read/write control
configurable strobe (low and high time) for higher PCLK clocks / lower speed NAND Flash devices
little endian/ big endian selectable
load interrupts when FIFO is ‘almost_empty’ & ’almost_full’ to ensure continuous data flow
Figure 31 Block Diagram of NAND Flash Interface
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