AS3525-A/-B C22O22
Data Sheet, Confidential
Ball Nr.
Ball Name
PAD Type
I/O
Ball Description
SSP master, frame or slave select
BGA224
ssp_fssout
O
C11
H9
D IO ST PU LSR
D IO ST PU LSR
ssp_fssin
ssp_clkout
ssp_clkin
ssp_rxd
I
SSP slave, frame select
SSP master, clock line
SSP slave, clock line
SSP receive data input
SSP transmit data output
O
I
D11
J10
I
D IO ST PU LSR
D IO ST PU LSR
ssp_txd
O
NandFlash / IDE
naf_d[0]
IO NAND FLASH data line (low byte)
IO IDE data line (low byte)
C13
A13
B14
D13
B13
C12
G11
B12
C14
E12
F11
D15
F12
E13
D14
E14
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
D IO ST PD LSR
ide_hd[0]
naf_d[1]
IO NAND FLASH data line (low byte)
IO IDE data line (low byte)
ide_hd[1]
naf_d[2]
IO NAND FLASH data line (low byte)
IO IDE data line (low byte)
ide_hd[2]
naf_d[3]
IO NAND FLASH data line (low byte)
IO IDE data line (low byte)
ide_hd[3]
naf_d[4]
IO NAND FLASH data line (low byte)
IO IDE data line (low byte)
ide_hd[4]
naf_d[5]
IO NAND FLASH data line (low byte)
IO IDE data line (low byte)
ide_hd[5]
naf_d[6]
IO NAND FLASH data line (low byte)
IO IDE data line (low byte)
ide_hd[6]
naf_d[7]
IO NAND FLASH data line (low byte)
IO IDE data line (low byte)
ide_hd[7]
naf_d[8]
IO NAND FLASH data line (high byte)
IO IDE data line (high byte)
ide_hd[8]
naf_d[9]
IO NAND FLASH data line (high byte)
IO IDE data line (high byte)
ide_hd[9]
naf_d[10]
ide_hd[10]
naf_d[11]
ide_hd[11]
naf_d[12]
ide_hd[12]
naf_d[13]
ide_hd[13]
naf_d[14]
ide_hd[14]
naf_d[15]
ide_hd[15]
naf_cle
IO NAND FLASH data line (high byte)
IO IDE data line (high byte)
IO NAND FLASH data line (high byte)
IO IDE data line (high byte)
IO NAND FLASH data line (high byte)
IO IDE data line (high byte)
IO NAND FLASH data line (high byte)
IO IDE data line (high byte)
IO NAND FLASH data line (high byte)
IO IDE data line (high byte)
IO NAND FLASH data line (high byte)
IO IDE data line (high byte)
O
I
NAND FLASH command latch enable
F14
F13
G12
D IO ST LSR
D IO ST LSR
D IO ST PD LSR
ide_dmarq
IDE DMA request
used for DMA data transfers between host and device
NAND FLASH address latch enable
naf_ale
O
I
ide_iordy
IDE IO ready signal
used by device to extend host data transfer cycles
NAND FLASH write protect not
naf_wp_n
ide_intrq
O
I
IDE interrupt request
used by device to interrupt the host controller
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AMSCO [ AMS(艾迈斯) ]
