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A3525BC21O22TRA 参数 Datasheet PDF下载

A3525BC21O22TRA图片预览
型号: A3525BC21O22TRA
PDF下载: 下载PDF文件 查看货源
内容描述: 先进的音频处理器系统 [Advanced Audio Processor System]
分类和应用:
文件页数/大小: 194 页 / 3286 K
品牌: AMSCO [ AMS(艾迈斯) ]
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AS3525-A/-B C22O22  
Data Sheet, Confidential  
Ball Nr.  
Ball Name  
PAD Type  
I/O  
Ball Description  
used for SDRAM devices only  
BGA224  
O
EXT. MEMORY dynamic memory chip select 1 not  
used for SDRAM devices only  
EXT. MEMORY row address strobe not  
used for SDRAM devices only  
E9  
J7  
mpmc_dycs_n[1] D OUT LSR LV  
O
O
O
O
O
O
O
mpmc_ras_n  
mpmc_we_n  
D OUT LSR LV  
D OUT LSR LV  
EXT. MEMORY write enable not  
F9  
D9  
used for SDRAM devices and static memories  
EXT. MEMORY static memory chip select 0 not  
used for static memory devices only  
EXT. MEMORY static memory chip select 0 not  
used for static memory devices only  
EXT. MEMORY byte lane select 0 not  
used for static memory devices only  
EXT. MEMORY byte lane select 1 not  
used for static memory devices only  
EXT. MEMORY output enable not  
mpmc_stcs_n[0] D OUT LSR LV  
mpmc_stcs_n[1] D OUT LSR LV  
L7  
A9  
mpmc_bls_n[0]  
mpmc_bls_n[1]  
mpmc_oe_n  
D OUT LSR LV  
D OUT LSR LV  
D OUT LSR LV  
K7  
D10  
used for static memory devices only  
L8  
E10  
L9  
mpmc_data[0]  
mpmc_data[1]  
mpmc_data[2]  
mpmc_data[3]  
mpmc_data[4]  
mpmc_data[5]  
mpmc_data[6]  
mpmc_data[7]  
mpmc_data[8]  
mpmc_data[9]  
mpmc_data[10]  
mpmc_data[11]  
mpmc_data[12]  
mpmc_data[13]  
mpmc_data[14]  
mpmc_data[15]  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
D IO ST PD LSR LV IO EXT. MEMORY data line  
F10  
K8  
A10  
J8  
B10  
H7  
C10  
G8  
E11  
G9  
A11  
J9  
B11  
DBOP  
G3  
H3  
dbop_d[12]  
dbop_d[13]  
dbop_d[14]  
dbop_d[15]  
D IO ST PD LSR  
D IO ST PD LSR  
D IO ST PD LSR  
D IO ST PD LSR  
IO DISPLAY data input/output (high byte)  
IO DISPLAY data input/output (high byte)  
IO DISPLAY data input/output (high byte)  
IO DISPLAY data input/output (high byte)  
A14  
C15  
USB 2.0 OTG  
vdda33t  
vssa33t  
vssa33t  
vssa33t  
usb_dp  
F2  
J1  
PWP_VD_RDO_3V  
PWP_VS_RDO_3V  
PWP_VS_RDO_3V  
PWP_VS_RDO_3V  
USB_ESD_5VT  
USB_ESD_5VT  
-
P
USB 3.3V analog power supply for OTG transceiver block  
USB 3.3V analog ground supply for OTG transceiver block  
USB 3.3V analog ground supply for OTG transceiver block  
USB 3.3V analog ground supply for OTG transceiver block  
USB D+ signal from USB cable  
P
P
P
A
A
H2  
G2  
G1  
H1  
K4  
usb_dm  
NC  
USB D- signal from USB cable  
test pin: must stay unconnected for normal operation  
mode  
K2  
J2  
NC  
-
test pin: must stay unconnected for normal operation  
mode  
USB external resistor connect  
usb_rext  
ANA_BI_RXT_3V  
A
analog signal to the external resistor for setting the bias  
© 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.  
www.austriamicrosystems.com Revision 1.13  
179 - 194  
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