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AM79C978KC/W 参数 Datasheet PDF下载

AM79C978KC/W图片预览
型号: AM79C978KC/W
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片1/10 Mbps的PCI家庭网络控制器 [Single-Chip 1/10 Mbps PCI Home Networking Controller]
分类和应用: 控制器PC
文件页数/大小: 261 页 / 3499 K
品牌: AMD [ AMD ]
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BCR36: PCI Power Management Capabilities (PMC)  
Alias Register  
BCR38: PCI DATA Register 1 (DATA1) Alias  
Register  
Note: This register is an alias of the PMC register  
located at offset 42h of the PCI Configuration Space.  
Since PMC register is read only, BCR36 provides a  
means of programming it through the EEPROM. The  
contents of this register are copied into the PMC regis-  
ter. For the definition of the bits in this register, refer to  
the PMC register definition. Bits 15-0 in this register are  
programmable through the EEPROM. Read accessible  
always. Read only. Cleared by H_RESET and is not af-  
fected by S_RESET or setting the STOP bit.  
Note: This register is an alias of the DATA register and  
also of the DATA_SCALE field of the PMCSR register.  
Since these two are read only, BCR38 provides a  
means of programming them through the EEPROM.  
The contents of this register are copied into the corre-  
sponding fields pointed with the DATA_SEL field set to  
one. Bits 15-0 in this register are programmable  
through the EEPROM.  
Bit  
Name  
Description  
15-10 RES  
Reserved locations. Written as  
zeros and read as undefined.  
BCR37: PCI DATA Register 0 (DATA0) Alias  
Register  
9-8  
D1_SCALE These bits correspond to the  
DATA_SCALE field of the PMC-  
SR (offset Register 44 of the PCI  
configuration space, bits 14-13).  
Refer to the description of  
DATA_SCALE for the meaning of  
this field.  
Note: This register is an alias of the DATA register and  
also of the DATA_SCALE field of the PMCSR register.  
Since these two are read only, BCR37 provides a  
means of programming them indirectly. The contents of  
this register are copied into the corresponding fields  
pointed with the DATA_SEL field set to zero. Bits 15-0  
in this register are programmable through the EE-  
PROM.  
These bits are always read ac-  
cessible. D1_SCALE is read only.  
Cleared by H_RESET and is not  
affected by S_RESET or setting  
the STOP bit.  
Bit  
Name  
Description  
15-10 RES  
Reserved locations. Written as  
zeros and read as undefined.  
9-8  
D0_SCALE These bits correspond to the  
DATA_SCALE field of the  
PMCSR (offset Register 44 of the  
PCI configuration space, bits 14-  
13). Refer to the description of  
DATA_SCALE for the meaning of  
this field.  
7-0  
DATA1  
These bits correspond to the PCI  
DATA register (offset Register 47  
of the PCI configuration space,  
bits 7-0). Refer to the description  
of DATA register for the meaning  
of this field.  
These bits are always read ac-  
cessible. DATA1 is read only.  
Cleared by H_RESET and is not  
affected by S_RESET or setting  
the STOP bit.  
Read  
accessible  
always.  
D0_SCALE is read only. Cleared  
by H_RESET and is not affected  
by S_RESET or setting the STOP  
bit.  
BCR39: PCI DATA Register 2 (DATA2) Alias  
Register  
7-0  
DATA0  
These bits correspond to the PCI  
DATA register (offset Register 47  
of the PCI configuration space,  
bits 7-0). Refer to the description  
of DATA register for the meaning  
of this field.  
Note: This register is an alias of the DATA register and  
also of the DATA_SCALE field of the PMCSR register.  
Since these two are read only, BCR39 provides a  
means of programming them through the EEPROM.  
The contents of this register are copied into the corre-  
sponding fields pointed with the DATA_SEL field set to  
two. Bits 15-0 in this register are programmable  
through the EEPROM.  
This bit is always read accessi-  
ble. DATA0 is read only. Cleared  
by H_RESET and is not affected  
by S_RESET or setting the STOP  
bit.  
Bit  
Name  
Description  
15-10 RES  
Reserved locations. Written as  
zeros and read as undefined.  
172  
Am79C978