Revision 5.01 – November 30, 2005
S5335 – PCI Bus Controller, 3.3V
Data Sheet
Pass-Thru Burst Reads
into the Pass-Thru Address Register (APTA). If the
S5335 determines that the address is within one of its
defined Pass-Thru regions, it indicates to the Add-On
that a write to the Pass-Thru Data Register (APTD) is
required. Figure 88 shows a 6 data phase Pass-Thru
burst read access (Add-On write) using PTADR#.
A Pass-Thru burst read operation occurs when a PCI
initiator reads multiple DWORDs from a Pass-Thru
region. A burst transfer consists of a single address
and a multiple data phases. During the address phase
of the PCI transfer, the S5335 stores the PCI address
Figure 88. Pass-Thru Burst Read
0
1
2
3
4
5
6
7
8
9
10
11
12
13
BPCLK
PTATN#
PTBURST#
PTNUM[1:0]
PTWR
1
0h
Fh
PTBE[3:0]#
SELECT#
ADR[6:2]
BE[3:0]#
WR#
2Ch
0h
PT ADDR DATA1DATA2 DATA3
DATA4
DATA5
DATA6 DATA7
DQ[31:0]
PTRDY#
PTADR#
to data register
Valid Data written in
AMCC Confidential and Proprietary
DS1657 152
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
