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S2021B 参数 Datasheet PDF下载

S2021B图片预览
型号: S2021B
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, BICMOS, PQFP208, THERMALLY ENHANCED, PLASTIC, PACKAGE-208]
分类和应用: 电信信息通信管理电信集成电路
文件页数/大小: 23 页 / 239 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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S2020/S2021  
HIPPI SOURCE/DESTINATION INTERFACE CIRCUITS  
holding this input high will maintain an asserted  
CONNECT signal on the HIPPI channel, while  
DATA LATENCY  
The data latency through the Destination device is  
defined as the time between detection of the BURST  
signal by the Destination device from the HIPPI, to  
the presentation of the data to the FIFO on the TTL  
data lines and the assertion of the DATA_VALID  
line. The data latency ranges from 2 to 6 clock  
cycles. There is no response by the Destination  
device on the HIPPI channel to data reception.  
dropping this input will deassert the CONNECT  
signal (Disconnect Function). If a Connect Request  
is rejected, holding this input high will maintain a  
deasserted CONNECT signal on the HIPPI channel  
(after the four cycle reject sequence) and disable  
further Connect Requests, while dropping this input  
will also maintain a deasserted CONNECT signal but  
will enable further Connect Requests.  
ACCEPT_REJECT (input) [ACCRJ]  
CONNECT CONTROL  
This input specifies the response to generate when  
CONNECT_IN is asserted during a Connect Request.  
A high on this input when CONNECT_IN is asserted  
will generate an Accept response, i.e., the CONNECT  
signal on the HIPPI channel will be asserted and will  
remain asserted until a Disconnect Function is initiated  
(CONNECT_IN is deasserted). A low on this input  
when CONNECT_IN is asserted will generate a Reject  
response, i.e., the CONNECT signal on the HIPPI  
channel will be asserted for four cycles then fall and  
remain deasserted until the response for the next  
Connect Request is initiated. The ACCEPT_REJECT  
signal needs to be valid only for the first cycle of the  
asserted CONNECT_IN input.  
Connection control is provided via the four signals in  
the “Connect Control” area on the Host-side of the  
Destination device. With this interface, the Host can  
monitor when a Connect Request or Disconnect  
Request comes in from the HIPPI Source, and then  
initiate the appropriate action in response to the  
request.  
SOURCE_AVAILABLE (output) [SRCAV]  
High indicates an active Source-to-Destination  
INTERCONNECT signal while the Destination  
device is in the on-line mode. Low indicates an  
inactive Source-to-Destination INTERCONNECT  
signal or the Destination device commanded to the  
off-line or disabled mode.  
Note: The host can have the Destination device  
automatically respond to connection requests by  
tying the CONNECT_REQUEST output to the  
CONNECT_IN input. In this case, the ACCEPT/  
REJECT signal would be used as an “available/busy”  
signal. While ACCEPT/REJECT was held low all  
connection requests would be rejected.  
CONNECT_REQUEST (output) [CONRQ]  
This signal indicates the state of the REQUEST signal  
on the HIPPI channel. High indicates a Connect  
Request function from the HIPPI channel, resulting  
from an asserted REQUEST signal while the Desti-  
nation device is in a functional operating mode with  
Connect Requests enabled. Low indicates either a  
false REQUEST signal on the HIPPI channel, a  
disabled Connect Request at this device, or that the  
Destination device is in a non-functional mode.  
DATA/FIFO CONTROL  
This interface provides control to the Destination  
Host system over the flow of data transfers on the  
HIPPI channel, and provides control of data transfer  
from the Destination device into the Destination Host  
system. It is intended for this interface to attach to an  
external synchronous FIFO or DMA mechanism  
which, in turn, attaches to the Destination Host  
memory system. Recommended FIFO’s capable of  
buffering 4 or more full Bursts are:  
CONNECT_IN (input) [CONIN]  
This signal controls the Connect Request and  
Response functions of the Destination device on the  
HIPPI channel. A low on this input will hold the  
CONNECT signal on the HIPPI channel inactive, and  
will enable the REQUEST signal from the HIPPI  
channel to control the CONNECT_REQUEST output  
of this Destination device.  
IDT P/N 72225LB20 1K x 18 bits  
IDT P/N 72235LB20 2K x 18 bits  
IDT P/N 72245LB20 4K x 18 bits  
During a Connect Request, asserting this input  
initiates one of two responses to the Request;  
Accept or Reject the Request. The desired response  
is selected with the ACCEPT_REJECT input,  
described next. If a Connect Request is accepted,  
The signals of this interface can be divided into three  
groups: Destination FLOW control, Destination FIFO  
control, and HIPPI data control.  
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