QT2022/32 - Data Sheet: DS3051
PHY_XS Vendor Specific
Register 4.C005h
PHY_XS Vendor Specific
Register 4.C006h
Bit
0
1
2
3
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
XAUI Lane 0 8b/10b Decode Error, RO/LH
1 = Decoding Error
XAUI Lane 1 8b/10b Decode Error, RO/LH
1 = Decoding Error
XAUI Lane 2 8b/10b Decode Error, RO/LH
1 = Decoding Error
XAUI Lane 3 8b/10b Decode Error, RO/LH
1 = Decoding Error
11:4
12
Reserved, RO
Reserved, RO
XAUI Lane 0 Clock Phase Error, RO/LH
1 = Clock Phase Error
13
14
15
XAUI Lane 1 Clock Phase Error, RO/LH
1 = Clock Phase Error
Reserved, RO
Reserved, RO
Reserved, RO
XAUI Lane 2 Clock Phase Error, RO/LH
1 = Clock Phase Error
XAUI Lane 3 Clock Phase Error, RO/LH
1 = Clock Phase Error
PHY_XS Vendor Specific
Register 4.C007h
Bit
1:0
XAUI analog loopback lane select (to RxXAUI3)
Bit 0 Bit 1 Lane
0
0
1
1
0
1
0
1
TxXAUI0 (default)
TxXAUI1
TxXAUI2
TxXAUI3
2
3
Analog XAUI Loopback Enable, RW
0 = Disabled (default)
1 = Enabled
Analog XAUI Loopback Clock Select, RW
0 = Loopback Lane Data (default)
1 = Loopback Lane Clock
7:4
8
Reserved, RO
Idle decoding disable, RW
0 = enable (default)
1 = disable
15:9
Reserved, RO
Revision 5.11
AppliedMicro - Confidential & Proprietary
181