QT2022/32 - Data Sheet: DS3051
PHY_XS Vendor Specific
VCO Monitor Control
Register 4.C020h
Bit
Monitor XAUI Lane 2 CDR Control Voltage 1
6
0 = Disable, Default
1 = Monitor Signal
Monitor XAUI Lane 3 CDR Control Voltage 1
0 = Disable, Default
7
1 = Monitor Signal
8
Override xtxlock[0]
0 = No Effect, Default
1 = Set xtxlock[0] to 1
9
Override xtxlock[1]
0 = No Effect, Default
1 = Set xtxlock[1] to 1
10
11
12
Override xtxlock[2]
0 = No Effect, Default
1 = Set xtxlock[2] to 1
Override xtxlock[3]
0 = No Effect, Default
1 = Set xtxlock[3] to 1
Override xrxlock
0 = No Effect, Default
1 = Set xrxlock to 1
13
14
15
Spare Reg, RW
Spare Reg, RW
Spare Reg, RW
1. When enabled, the TxXMONCV output signal will monitor the selected lane. Do not enable more than one lane at a time.
PHY_XS Vendor Specific
XAUI Lane 0 Error
Counter
PHY_XS Vendor Specific
XAUI Lane 1 Error
Counter
PHY_XS Vendor Specific
XAUI Lane 2 Error
Counter
PHY_XS Vendor Specific
XAUI Lane 3 Error
Counter
Bit
Register 4.C030h
4.C031h
4.C032h
4.C033h
7:0
XAUI Lane 0 Error Counter,
RO
XAUI Lane 1 Error Counter,
RO
XAUI Lane 2 Error Counter,
RO
XAUI Lane 3 Error Counter,
RO
cleared upon read
non-rollover
cleared upon read
non-rollover
cleared upon read
non-rollover
cleared upon read
non-rollover
Counts 8b/10b decode Errors
in functional mode.
Counts 8b/10b decode Errors
in functional mode.
Counts 8b/10b decode Errors
in functional mode.
Counts 8b/10b decode Errors
in functional mode.
Counts PRBS errors when
XAUI PRBS Checker is ena-
bled.
Counts PRBS errors when
XAUI PRBS Checker is ena-
bled.
Counts PRBS errors when
XAUI PRBS Checker is ena-
bled.
Counts PRBS errors when
XAUI PRBS Checker is ena-
bled.
15:8
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
184
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