Revision 1.23 - Sept 26, 2006
Data Sheet
PowerPC 440SP Embedded Processor
Table 6. Signal Functional Description (Sheet 4 of 7)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to 3.3V)
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to 3.3V)
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Ethernet Interface
Description
I/O
Type
Notes
EMCCD
Collision detection.
Carrier sense.
I
I
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
EMCCrS
EMCMDClk
Management data clock.
O
Transfer command and status information between MII
and PHY.
EMCMDIO
I/O
3.3V LVTTL
EMCRxD0:7
EMCRxDV
EMCRxErr
EMCRxClk
EMCRefClk
EMCTxClk
EMCGTxClk
EMCTxD0:7
EMCTxEn
Receive data.
I
I
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
Receive data valid.
Receive error.
I
Receive clock.
I
Reference clock.
Transmit clock.
I
I
Ethernet gigabit transmit clock.
Transmit data.
O
O
O
O
Transmit data enabled.
Transmit error.
EMCTxErr,
External Slave Peripheral Interface
Peripheral address bus.
PerAddr00:23
O
3.3V LVTTL
1
1
Note:PerAddr00 is the most significant bit (msb).
PerBE0
External peripheral data bus byte enable.
O
O
O
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
Used by the peripheral controller to indicates the last
transfer of a memory access.
PerBLast
PerCS0:2
External peripheral device select.
Peripheral data bus.
PerData0:7
I/O
3.3V LVTTL
1
Note:PerData0 is the most significant bit (msb).
Used by peripheral controller or DMA controller
depending upon the type of transfer involved. When the
PPC440SP is the bus master, it enables the selected
device to drive the bus.
PerOE
O
3.3V LVTTL
PerPar0
External peripheral data bus byte parity.
I/O
I
3.3V LVTTL
3.3V LVTTL
1
1
Used by a peripheral slave to indicate it is ready to
transfer data.
PerReady
Used as output by the peripheral controller. High
indicates a read from memory, low indicates a write to
memory.
PerR/W
O
3.3V LVTTL
PerWE
PerClk
Write Enable.
O
O
3.3V LVTTL
3.3V LVTTL
Peripheral clock used by synchronous peripheral slaves.
External error used as an input to record external slave
peripheral errors.
PerErr
I
3.3V LVTTL
1, 5
AMCC Proprietary
59
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
