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PPC440SP-AFC667C 参数 Datasheet PDF下载

PPC440SP-AFC667C图片预览
型号: PPC440SP-AFC667C
PDF下载: 下载PDF文件 查看货源
内容描述: 的PowerPC 440SP嵌入式处理器 [PowerPC 440SP Embedded Processor]
分类和应用: PC
文件页数/大小: 85 页 / 1264 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.23 - Sept 26, 2006  
Data Sheet  
PowerPC 440SP Embedded Processor  
Table 6. Signal Functional Description (Sheet 2 of 7)  
Notes:  
1. Receiver input has hysteresis  
2. Must pull up (recommended value is 3kΩ to 3.3V)  
3. Must pull down (recommended value is 1kΩ)  
4. If not used, must pull up (recommended value is 3kΩ to 3.3V)  
5. If not used, must pull down (recommended value is 1kΩ)  
6. Strapping input during reset; pull-up or pull-down required  
Signal Name  
PCIX0M66En  
Description  
Capable of 66MHz operation.  
I/O  
Type  
Notes  
5
3.3V PCI or  
I
1.5V PCI for mode 2  
3.3V PCI or  
PCIX1:2M66En  
Capable of 66MHz operation.  
Even parity indicator or ECC0.  
I
1.5V PCI for mode 2  
3.3V PCI or  
Normally used to indicate even parity across  
PCIAD31:00 and BE3:0.  
PCIX0:2Par/PCIX0:2ECC0  
I/O  
1.5V PCI for mode 2  
Used as ECC0 for PCIX0:2 mode 2.  
Even parity indicator or ECC7.  
Normally used to indicate even parity across  
PCIAD63:32 and BE7:4 for PCI0 and PCI1.  
3.3V PCI or  
PCIX0:1Par64/PCIX0:1ECC7  
PCIX0:2PErr  
I/O  
1.5V PCI for mode 2  
or  
Used as ECC7 for PCIX0:1 mode 2.  
Reports data parity errors during all PCI transactions  
except a Special Cycle.  
I/O  
I/O  
3.3V PCI  
3.3V PCI  
4
4
An indication to the PCI-X arbiter that the specified  
agent wishes to use the bus. When using an external  
PCI/PCI-X arbiter, connect the external arbiter's  
Request line to this signal.  
PCIX0:2Req0:1  
PCIX0:1Req2:3  
Request 64-bit transfer or ECC6.  
Normally used by the current bus master to indicate a  
64-bit transfer.  
3.3V PCI or  
PCIX0:1Req64/PCIX0:1ECC6  
I/O  
4
1.5V PCI for mode 2  
or  
Used as ECC6 for PCIX2 mode 2.  
PCIX0:2Reset  
PCIX0:2SErr  
Sets PCI device registers and logic to a consistent state.  
O
3.3V PCI  
3.3V PCI  
Reports address parity errors, data parity errors on the  
Special Cycle command, or other catastrophic system  
errors.  
I/O  
4
Indicates the current target is requesting the master to  
stop the current transaction.  
PCIX0:2Stop  
I/O  
I/O  
3.3V PCI  
3.3V PCI  
4
4
Indicates the target agent’s ability to complete the  
current data phase of the transaction.  
PCIX0:2TRDY  
Voltage control output. Used to control the voltage  
regulator supplying the PCI I/O voltage. See PCI-XCap  
signal.  
PCIX0:2VC  
O
I
3.3(1.5)V PCI  
VPCIXDDR  
0 = 3.3V (PCI I/O)  
1 =1.5V (PCI-X DDR)  
Voltage reference input for PCI-X mode 2/DDR (1.5V)  
I/O. Not used for PCI or PCI-X mode 1.  
PCIX0:2VRef0:1  
5
AMCC Proprietary  
57  
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