Revision 1.07 – October 4, 2007
440GP – Power PC 440GP Embedded Processor
Data Sheet
Signal Functional Description (Sheet 7 of 7)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to 3.3V, 10kΩ to 5V)
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to 3.3V)
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Trace Interface
Description
I/O
Type
Notes
5V tolerant
TrcBS0:2
TrcClk
Trace branch execution status.
I/O
O
3.3V LVTTL
Trace data capture clock, runs at 1/4 the frequency of the
processor.
5V tolerant
3.3V LVTTL
Trace Execution Status is presented every fourth processor clock
cycle.
5V tolerant
TrcES0:4
TrcTS0:6
I/O
I/O
3.3V LVTTL
5V tolerant
3.3V LVTTL
Additional information on trace execution and branch status.
Power Pins
AGND
PLL (analog) voltage ground.
Ground.
na
na
na
na
GND
1.8V—Filtered voltages input for PLLs (analog circuits)
Note: A separate filter for each of the three voltages is
recommended.
AxVDD
na
na
OVDD
SVDD
VDD
3.3V supply—I/O (except DDR SDRAM)
2.5V supply—DDR SDRAM
na
na
na
na
na
na
1.8V supply—Logic voltage.
Reserved Pins
Reserved
Do not connect signals, voltage, or ground to these balls.
na
na
54
AMCC
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
