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PPC440GP-3RC400C 参数 Datasheet PDF下载

PPC440GP-3RC400C图片预览
型号: PPC440GP-3RC400C
PDF下载: 下载PDF文件 查看货源
内容描述: 的Power PC 440GP嵌入式处理器 [Power PC 440GP Embedded Processor]
分类和应用: 微控制器和处理器外围集成电路微处理器PC时钟
文件页数/大小: 83 页 / 1393 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.07 – October 4, 2007  
440GP – Power PC 440GP Embedded Processor  
Data Sheet  
Signal Functional Description (Sheet 6 of 7)  
Notes:  
1. Receiver input has hysteresis  
2. Must pull up (recommended value is 3kΩ to 3.3V, 10kΩ to 5V)  
3. Must pull down (recommended value is 1kΩ)  
4. If not used, must pull up (recommended value is 3kΩ to 3.3V)  
5. If not used, must pull down (recommended value is 1kΩ)  
6. Strapping input during reset; pull-up or pull-down required  
Signal Name  
System Interface  
Description  
I/O  
Type  
Notes  
5V tolerant  
SysClk  
SysErr  
Main system clock input.  
Clock  
O
3.3V LVTTL  
5V tolerant  
3.3V LVTTL  
Set to 1 when a machine check is generated.  
Main system reset. External logic can drive this bidirectional pin  
low (minimum of 16 cycles) to initiate a system reset. A system  
reset can also be initiated by software. The signal is implemented  
as an open-drain output (two states; 0 or open circuit).  
During chip power-up, this signal must be low from the start of VDD  
ramp-up until at least 16 SysClk cycles after VDD is stable.  
5V tolerant  
3.3V LVTTL  
SysReset  
I/O  
1, 2  
5V tolerant  
TmrClk  
Halt  
Processor timer external input clock.  
Halt from external debugger.  
I
3.3V LVTTL  
5V tolerant  
3.3V LVTTL  
I
1, 4  
General purpose I/O 0 through 10. To access these functions,  
software must set DCR register bits.  
5V tolerant  
GPIO00:31  
TestEn  
I/O  
3.3V LVTTL  
1.8V CMOS  
w/pull-down  
Test Enable.  
I
I
I
I
3
5V tolerant  
3.3V LVTTL  
RcvrInh  
RefVEn  
DrvrInh1:2  
Receiver Inhibit. Active only when TestEn is active.  
Reference Voltage Enable. Do not connect for normal operation.  
Pull up for Boundary Scan Description Language (BSDL) testing.  
1.8V CMOS  
w/pull-down  
Driver Inhibit. Used for test purposes only. Tie up for normal  
operation  
5V tolerant  
3.3V LVTTL  
2
AMCC  
53  
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