Chapter 13: IEEE 1149.1 (JTAG) Boundary-Scan Testing for MAX II Devices
13–9
IEEE Std. 1149.1 BST Operation Control
During the SHIFT_IRstate, an instruction code is entered by shifting data on the TDI
pin on the rising edge of TCK. The last bit of the opcode must be clocked at the same
time that the next state, EXIT1_IR, is activated; EXIT1_IRis entered by clocking a
logic high on TMS. Once in the EXIT1_IRstate, TDO becomes tri-stated again. TDOis
always tri-stated except in the SHIFT_IRand SHIFT_DRstates. After an instruction
code is entered correctly, the TAP controller advances to perform the serial shifting of
test data in one of three modes—SAMPLE/PRELOAD, EXTEST, or BYPASS—that are
described below.
For MAX II devices, there are weak pull-up resistors for TDIand TMS, and pull-down
resistors for TCK. However, in a JTAG chain, there might be some devices that do not
have internal pull-up or pull-down resistors. In this case, Altera recommends pulling
the TMSpin high (through an external 10-kΩ resistor), and pulling TCKlow (through
an external 1-kΩ resistor) during BST or in-system programmability (ISP) to prevent
the TAP controller from going into an unintended state. Pulling-up the TDIsignal
externally for the MAX II device is optional.
f
For more information about the pull-up and pull-down resistors, refer to the In-System
Programmability Guidelines for MAX II Devices chapter in the MAX II Device Handbook.
SAMPLE/PRELOAD Instruction Mode
The SAMPLE/PRELOADinstruction mode allows you to take a snapshot of device data
without interrupting normal device operation. However, this instruction mode is
most often used to preload the test data into the update registers prior to loading the
EXTESTinstruction. Figure 13–8 shows the capture, shift, and update phases of the
SAMPLE/PRELOADmode.
© October 2008 Altera Corporation
MAX II Device Handbook
ALTERA [ ALTERA CORPORATION ]
