欢迎访问ic37.com |
会员登录 免费注册
发布采购

EPM240T100C5 参数 Datasheet PDF下载

EPM240T100C5图片预览
型号: EPM240T100C5
PDF下载: 下载PDF文件 查看货源
内容描述: [最大II器件]
分类和应用: 可编程逻辑器件输入元件PC
文件页数/大小: 295 页 / 3815 K
品牌: ALTERA [ ALTERA CORPORATION ]
 浏览型号EPM240T100C5的Datasheet PDF文件第225页浏览型号EPM240T100C5的Datasheet PDF文件第226页浏览型号EPM240T100C5的Datasheet PDF文件第227页浏览型号EPM240T100C5的Datasheet PDF文件第228页浏览型号EPM240T100C5的Datasheet PDF文件第230页浏览型号EPM240T100C5的Datasheet PDF文件第231页浏览型号EPM240T100C5的Datasheet PDF文件第232页浏览型号EPM240T100C5的Datasheet PDF文件第233页  
Chapter 13: IEEE 1149.1 (JTAG) Boundary-Scan Testing for MAX II Devices  
13–11  
IEEE Std. 1149.1 BST Operation Control  
During the capture phase, multiplexers preceding the capture registers select the  
active device data signals; this data is then clocked into the capture registers. The  
multiplexers at the outputs of the update registers also select active device data to  
prevent functional interruptions to the device. During the shift phase, the boundary-  
scan shift register is formed by clocking data through capture registers around the  
device periphery and then out of the TDOpin. New test data can simultaneously be  
shifted into TDIand replace the contents of the capture registers. During the update  
phase, data in the capture registers is transferred to the update registers. This data can  
then be used in the EXTESTinstruction mode.  
Refer to “EXTEST Instruction Mode” on page 13–11 for more information.  
Figure 13–9 shows the SAMPLE/PRELOADwaveforms. The SAMPLE/PRELOAD  
instruction code is shifted in through the TDIpin. The TAP controller advances to the  
CAPTURE_DRstate and then to the SHIFT_DRstate, where it remains if TMSis held  
low. The data shifted out of the TDOpin consists of the data that was present in the  
capture registers after the capture phase. New test data shifted into the TDIpin  
appears at the TDOpin after being clocked through the entire boundary-scan register.  
Figure 13–9 shows that the test data that shifted into TDIdoes not appear at the TDO  
pin until after the capture register data that is shifted out. If TMSis held high on two  
consecutive TCKclock cycles, the TAP controller advances to the UPDATE_DRstate for  
the update phase.  
If the device output enable feature is enabled but the DEV_OEpin is not asserted  
during boundary-scan testing, the OE boundary-scan registers of the boundary-scan  
cells capture data from the core of the device during SAMPLE/PRELOAD. These values  
are not high impedance, although the I/O pins are tri-stated.  
Figure 13–9. SAMPLE/PRELOAD Shift Data Register Waveforms  
TCK  
TMS  
TDI  
TDO  
SHIFT_IR  
TAP_STATE  
SHIFT_DR  
EXIT1_IR  
UPDATE_IR  
EXIT1_DR  
SELECT_DR_SCAN  
After boundry-scan  
register data has been  
shifted out, data  
entered into TDI will  
shift out of TDO.  
Data stored in  
boundary-scan  
register is shifted  
out of TDO.  
Instruction Code  
UPDATE_DR  
CAPTURE_DR  
EXTEST Instruction Mode  
The EXTESTinstruction mode is used primarily to check external pin connections  
between devices. Unlike the SAMPLE/PRELOADmode, EXTESTallows test data to be  
forced onto the pin signals. By forcing known logic high and low levels on output  
pins, opens and shorts can be detected at pins of any device in the scan chain.  
Figure 13–10 shows the capture, shift, and update phases of the EXTESTmode.  
© October 2008 Altera Corporation  
MAX II Device Handbook  
 复制成功!