13–10
Chapter 13: IEEE 1149.1 (JTAG) Boundary-Scan Testing for MAX II Devices
IEEE Std. 1149.1 BST Operation Control
Figure 13–8. IEEE Std. 1149.1 BST SAMPLE/PRELOAD Mode
SDO
PIN_IN
INJ
0
1
D
Input
Q
PIN_OE
0
OEJ
1
0
1
0
1
D
Q
D
D
Q
Q
OE
OE
OUTJ
PIN_OUT
0
1
0
1
D
Q
Pin
Output
Output
Output
Buffer
SHIFT
CLOCK
UPDATE
HIGHZ MODE
Global Signals
Capture
Registers
Update
Registers
SDI
(Capture Phase)
SDO
PIN_IN
INJ
0
1
D
Input
Q
PIN_OE
OEJ
0
1
0
1
0
1
D
Q
D
D
Q
Q
OE
OE
OUTJ
PIN_OUT
0
1
0
1
D
Q
Pin
Output
Output
Output
Buffer
SHIFT
CLOCK
UPDATE
HIGHZ MODE
Global Signals
Capture
Registers
Update
Registers
SDI
(Shift and Update Phase)
MAX II Device Handbook
© October 2008 Altera Corporation
ALTERA [ ALTERA CORPORATION ]
