Chapter 13: IEEE 1149.1 (JTAG) Boundary-Scan Testing for MAX II Devices
13–5
IEEE Std. 1149.1 Boundary-Scan Register
Figure 13–4 shows the User I/O Boundary-Scan Cell of MAX II devices.
Figure 13–4. MAX II Device’s User I/O BSC with IEEE Std. 1149.1 BST Circuitry
SDO
PIN_IN
INJ
0
1
D
Input
Q
PIN_OE
OEJ
0
1
0
1
0
1
D
Q
D
D
Q
Q
OE
OE
From or To Device
I/O Cell Circuitry
And/Or Logic Core
OUTJ
PIN_OUT
0
1
0
1
D
Q
Pin
Output
Output
Output
Buffer
SHIFT
CLOCK
UPDATE
HIGHZ MODE
Global Signals
Capture
Registers
Update
Registers
SDI
Table 13–2 describes the capture and update register capabilities of all boundary-scan
cells within MAX II devices.
Table 13–2. MAX II Device’s Boundary-Scan Cell Descriptions (Note 1)
Captures
Drives
Output
Capture
Register
Output
OE Capture
Register
InputCapture
Register
Update
OE Update InputUpdate
Pin Type
Register
Register
Register
Notes
User I/O
OUTJ
OEJ
PIN_IN
PIN_OUT
PIN_OE
—
Includes
User Clocks
Note to Table 13–2:
(1) TDI, TDO, TMS, and TCKpins, and all VCC and GND pin types do not have boundary-scan cells.
JTAG Pins and Power Pins
MAX II devices do not have boundary-scan cells for the dedicated JTAG pins (TDI,
TDO, TMS, and TCK) and power pins (VCCINT, VCCIO, GNDINT, and GNDIO).
© October 2008 Altera Corporation
MAX II Device Handbook
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