DC and Switching Characteristics
This section describes and specifies the performance, internal, external,
and UFM timing specifications. All specifications are representative of
the worst-case supply voltage and junction temperature conditions.
Preliminary and Final Timing
Timing models can have either preliminary or final status. The
Quartus® II software issues an informational message during the design
compilation if the timing models are preliminary. Table 5–13 shows the
status of the MAX II device timing models.
Preliminary status means the timing model is subject to change. Initially,
timing numbers are created using simulation results, process data, and
other known parameters. These tests are used to make the preliminary
numbers as close to the actual timing parameters as possible.
Final timing numbers are based on actual device operation and testing.
These numbers reflect the actual performance of the device under the
worst-case voltage and junction temperature conditions.
Table 5–13. MAX II Device Timing Model Status
Device
Preliminary
Final
EPM240
—
v
—
EPM240Z (1)
v
EPM570
—
v
—
EPM570Z (1)
EPM1270
v
—
—
v
v
EPM2210
Note to Table 5–13:
(1) The MAX IIZ device timing models are only available in the Quartus II software
version 8.0 and later.
Altera Corporation
July 2008
5–11
MAX II Device Handbook, Volume 1