MAX II Architecture
This chapter referenced the following documents:
Referenced
Documents
■
■
AN 428: MAX II CPLD Design Guidelines
DC and Switching Characteristics chapter in the MAX II Device
Handbook
■
■
Hot Socketing and Power-On Reset in MAX II Devices chapter in the
MAX II Device Handbook
Using User Flash Memory in MAX II Devices chapter in the MAX II
Device Handbook
Table 2–8 shows the revision history for this chapter.
Document
Revision History
Table 2–8. Document Revision History
Date and
Document
Version
Changes Made
Summary of Changes
March 2008
v2.1
Updated “Schmitt Trigger” section.
—
December 2007
v2.0
●
●
●
●
●
Updated “Clear and Preset Logic Control” section.
Updated “MultiVolt Core” section.
Updated “MultiVolt I/O Interface” section.
Updated Table 2–7.
Updated document with
MAX IIZ information.
Added “Referenced Documents” section.
December 2006
v1.7
—
—
Minor update in “Internal Oscillator” section. Added document
revision history.
August 2006
v1.6
Updated functional description and I/O structure sections.
July 2006 v1.5
Minor content and table updates.
—
—
February 2006
v1.4
●
●
●
●
Updated “LAB Control Signals” section.
Updated “Clear and Preset Logic Control” section.
Updated “Internal Oscillator” section.
Updated Table 2–5.
August 2005
v1.3
Removed Note 2 from Table 2-7.
—
—
—
December 2004 Added a paragraph to page 2-15.
v1.2
June 2004 v1.1 Added CFM acronym. Corrected Figure 2-19.
Altera Corporation
March 2008
2–41
MAX II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
