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EPM1270GT144I4N 参数 Datasheet PDF下载

EPM1270GT144I4N图片预览
型号: EPM1270GT144I4N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 8.1ns, 980-Cell, CMOS, PQFP144, 22 X 22 MM, 0.50 MM PITCH, LEAD FREE, TQFP-144]
分类和应用: LTE输入元件可编程逻辑
文件页数/大小: 108 页 / 1342 K
品牌: ALTERA [ ALTERA CORPORATION ]
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IEEE Std. 1149.1 (JTAG) Boundary-Scan Support  
Table 3–1. MAX II JTAG Instructions (Part 2 of 2)  
JTAG Instruction  
Instruction Code  
Description  
USERCODE  
00 0000 0111  
Selects the 32-bit USERCODEregister and places it between  
the TDIand TDOpins, allowing the USERCODEto be serially  
shifted out of TDO. This register defaults to all 1’s if not  
specified in the Quartus II software.  
IDCODE  
00 0000 0110  
00 0000 1011  
Selects the IDCODEregister and places it between TDIand  
TDO, allowing the IDCODE to be serially shifted out of TDO.  
HIGHZ(1)  
Places the 1-bit bypass register between the TDIand TDO  
pins, which allows the boundary scan test data to pass  
synchronously through selected devices to adjacent devices  
during normal device operation, while tri-stating all of the I/O  
pins.  
CLAMP(1)  
00 0000 1010  
Places the 1-bit bypass register between the TDIand TDO  
pins, which allows the boundary scan test data to pass  
synchronously through selected devices to adjacent devices  
during normal device operation, while holding I/O pins to a  
state defined by the data in the boundary-scan register.  
USER0  
USER1  
00 0000 1100  
00 0000 1110  
(2)  
This instruction allows you to define the scan chain between  
TDIand TDOin the MAX II logic array. This instruction is also  
used for custom logic and JTAG interfaces.  
This instruction allows you to define the scan chain between  
TDIand TDOin the MAX II logic array. This instruction is also  
used for custom logic and JTAG interfaces.  
IEEE 1532 instructions  
IEEE 1532 ISC instructions used when programming a MAX II  
device via the JTAG port.  
Notes to Table 3–1:  
(1) HIGHZ, CLAMP, and EXTESTinstructions do not disable weak pull-up resistors or bus hold features.  
(2) These instructions are shown in the 1532 BSDL files, which will be posted on the Altera® website at  
www.altera.com when they are available.  
w
Unsupported JTAG instructions should not be issued to the  
MAX II device as this may put the device into an unknown state,  
requiring a power cycle to recover device operation.  
3–2  
MAX II Device Handbook, Volume 1  
Core Version a.b.c variable  
Altera Corporation  
December 2007  
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