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EPCS4SI8N 参数 Datasheet PDF下载

EPCS4SI8N图片预览
型号: EPCS4SI8N
PDF下载: 下载PDF文件 查看货源
内容描述: 串行配置器件 [Serial Configuration Devices]
分类和应用: 存储内存集成电路光电二极管过程控制系统PCSLTE可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 32 页 / 241 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Serial Configuration Device Memory Access  
available when all the block protect bits are 0. When any of the block  
protect bits are set to one, the relevant area is protected from being  
written by write bytes operations or erased by erase sector operations.  
Table 4–9. Block Protection Bits in EPCS4 Devices  
Status Register Content  
Memory Content  
Protected Area Unprotected Area  
BP2 Bit BP1 Bit BP0 Bit  
None  
All eight sectors: 0 to 7  
Seven sectors: 0 to 6  
Six sectors: 0 to 5  
Four sectors: 0 to 3  
None  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Sector 7  
Sectors 6 and 7  
Four sectors: 4 to 7  
All sectors  
All sectors  
None  
All sectors  
None  
All sectors  
None  
Table 4–10. Block Protection Bits in EPCS1  
Status Register Content  
Memory Content  
BP1 Bit  
BP0 Bit  
Protected Area  
Unprotected Area  
All four sectors: 0 to 3  
Three sectors: 0 to 2  
Two sectors: 0 and 1  
None  
None  
0
0
1
1
0
1
0
1
Sector 3  
Two sectors: 2 and 3  
All sectors  
The status register can be read at any time, even while a write or erase  
cycle is in progress. When one of these cycles is in progress, you can check  
the write in progress bit (bit 0of the status register) before sending a new  
operation to the device. The device can also read the status register  
continuously, as shown in Figure 4–9.  
4–14  
Core Version a.b.c variable  
Altera Corporation  
July 2004  
Configuration Handbook, Volume 2