1–24
Chapter 1: Cyclone III Device Data Sheet
Switching Characteristics
Table 1–33 lists the transmitter channel-to-channel skew specifications for Cyclone III
devices.
Table 1–33. Cyclone III Devices Transmitter Channel-to-Channel Skew (TCCS) – Write Side (Note 1) (Part 1 of 2)
Column I/Os (ps)
Row I/Os (ps)
Wraparound Mode (ps)
Memory
Standard
I/O Standard
Lead
Lag
C6
Lead
Lag
Lead
Lag
SSTL-18 Class I
SSTL-18 Class II
SSTL-2 Class I
790
870
750
860
780
830
380
490
320
350
410
510
790
870
750
860
780
830
380
490
320
350
410
510
890
970
850
960
880
930
480
590
420
450
510
610
DDR2 SDRAM
DDR SDRAM
QDRII SRAM
SSTL-2 Class II
1.8 V HSTL Class I
1.8 V HSTL Class II
C7
SSTL-18 Class I
SSTL-18 Class II
SSTL-2 Class I
915
1025
880
410
545
340
380
450
570
915
1025
880
410
545
340
380
450
570
1015
1125
980
510
645
440
480
550
670
DDR2 SDRAM
DDR SDRAM
QDRII SRAM
SSTL-2 Class II
1.8 V HSTL Class I
1.8 V HSTL Class II
1010
910
1010
910
1110
1010
1110
1010
1010
C8
SSTL-18 Class I
SSTL-18 Class II
SSTL-2 Class I
1040
1180
1010
1160
1040
1190
440
600
360
410
490
630
I7
1040
1180
1010
1160
1040
1190
440
600
360
410
490
630
1140
1280
1110
1260
1140
1290
540
700
460
510
590
730
DDR2 SDRAM
DDR SDRAM
QDRII SRAM
SSTL-2 Class II
1.8 V HSTL Class I
1.8 V HSTL Class II
SSTL-18 Class I
SSTL-18 Class II
SSTL-2 Class I
961
1076
924
431
572
357
399
473
599
A7
961
1076
924
431
572
357
399
473
599
1061
1176
1024
1161
1056
1161
531
672
457
499
573
699
DDR2 SDRAM
DDR SDRAM
QDRII SRAM
SSTL-2 Class II
1.8 V HSTL Class I
1.8 V HSTL Class II
1061
956
1061
956
1061
1061
SSTL-18 Class I
SSTL-18 Class II
SSTL-2 Class I
SSTL-2 Class II
1092
1239
1061
1218
462
630
378
431
1092
1239
1061
1218
462
630
378
431
1192
1339
1161
1318
562
730
478
531
DDR2 SDRAM
(2)
DDR SDRAM
Cyclone III Device Handbook, Volume 2
© January 2010 Altera Corporation