Chapter 1: Cyclone III Device Data Sheet
1–19
Switching Characteristics
Table 1–26. Cyclone III Devices RSDS Transmitter Timing Specifications
(Note 1), (2) (Part 2 of 2)
C6
C7, I7
C8, A7
Min Typ Max
Symbol
Modes
Unit
Min Typ Max Min Typ Max
×10
×8
×7
×4
×2
×1
—
—
100
80
70
40
20
10
45
—
—
—
—
—
—
—
—
—
360
360
360
360
360
360
55
100
80
70
40
20
10
45
—
—
—
—
—
—
—
—
—
311
311
311
311
311
311
55
100
80
70
40
20
10
45
—
—
—
—
—
—
—
—
—
311 Mbps
311 Mbps
311 Mbps
311 Mbps
311 Mbps
311 Mbps
Device operation in
Mbps
tDUTY
55
%
TCCS
200
200
200
ps
Output jitter
(peak to peak)
—
—
—
500
—
—
500
—
—
550
ps
tRISE
20 – 80%, CLOAD = 5 pF
20 – 80%, CLOAD = 5 pF
—
—
—
—
500
500
—
—
—
1
—
—
—
500
500
—
—
—
1
—
—
—
500
500
—
—
—
1
ps
ps
tFALL
tLOCK (3)
ms
Notes to Table 1–26:
(1) Applicable for true RSDS and emulated RSDS_E_3R transmitter.
(2) True RSDS transmitter is only supported at output pin of Row I/O (Banks 1, 2, 5, and 6). Emulated RSDS transmitter is supported at the output
pin of all I/O banks.
(3) tLOCK is the time required for the PLL to lock from the end of device configuration.
Table 1–27. Cyclone III Devices Emulated RSDS_E_1R Transmitter Timing Specifications (Note 1) (Part 1 of 2)
C6
C7, I7
C8, A7
Symbol
Modes
Unit
Min
10
10
10
10
10
10
100
80
70
40
20
10
45
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max
85
Min
10
10
10
10
10
10
100
80
70
40
20
10
45
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max
85
Min
10
10
10
10
10
10
100
80
70
40
20
10
45
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max
85
×10
×8
×7
×4
×2
×1
×10
×8
×7
×4
×2
×1
—
—
MHz
MHz
MHz
MHz
MHz
MHz
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
%
85
85
85
fHSCLK (input
clock
frequency)
85
85
85
85
85
85
85
85
85
170
170
170
170
170
170
170
55
170
170
170
170
170
170
170
55
170
170
170
170
170
170
170
55
Device
operation in
Mbps
tDUTY
TCCS
200
200
200
ps
Output jitter
(peak to
peak)
—
—
—
500
—
—
500
—
—
550
ps
© January 2010 Altera Corporation
Cyclone III Device Handbook, Volume 2
ALTERA [ ALTERA CORPORATION ]
