Chapter 1: Cyclone III Device Data Sheet
1–15
Switching Characteristics
Switching Characteristics
This section provides the performance characteristics of the core and periphery blocks
for Cyclone III devices. All data is final and is based on actual silicon characterization
and testing. These numbers reflect the actual performance of the device under
worst-case silicon process, voltage, and junction temperature conditions.
Core Performance Specifications
Clock Tree Specifications
Table 1–19 lists the clock tree specifications for Cyclone III devices.
Table 1–19. Cyclone III Devices Clock Tree Performance
Performance
Device
Unit
C6
C7
C8
EP3C5
500
500
500
500
500
500
500
(1)
437.5
437.5
437.5
437.5
437.5
437.5
437.5
437.5
402
402
402
402
402
402
402
402
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
EP3C10
EP3C16
EP3C25
EP3C40
EP3C55
EP3C80
EP3C120
Note to Table 1–19:
(1) EP3C120 offered in C7, C8, and I7 grades only.
PLL Specifications
Table 1–20 describes the PLL specifications for Cyclone III devices when operating in
the commercial junction temperature range (0°C to 85°C), the industrial junction
temperature range (–40°C to 100°C), and the automotive junction temperature range
(–40°Cto 125°C). For more information about PLL block, refer to “PLL Block” in
“Glossary” on page 1–27.
Table 1–20. Cyclone III Devices PLL Specifications (Note 1) (Part 1 of 2)
Symbol Parameter
Min
5
Typ
—
—
—
—
Max
472.5
325
Unit
MHz
MHz
MHz
%
fIN (2)
fINPFD
Input clock frequency
PFD input frequency
5
fVCO (3)
fINDUTY
PLL internal VCO operating range
Input clock duty cycle
600
40
1300
60
Input clock cycle-to-cycle jitter
FREF ≥ 100 MHz
—
—
—
—
—
—
0.15
750
UI
ps
tINJITTER_CCJ (4)
FREF < 100 MHz
fOUT_EXT (external clock output)
(2)
PLL output frequency
472.5
MHz
© January 2010 Altera Corporation
Cyclone III Device Handbook, Volume 2