IEEE 1149.1 (JTAG) Boundary-Scan Testing for Cyclone II Devices
Figure 14–7. Selecting the Instruction Mode
TCK
TMS
TDI
TDO
SHIFT_IR
TAP_STATE
RUN_TEST/IDLE SELECT_IR_SCAN
TEST_LOGIC/RESET SELECT_DR_SCAN
CAPTURE_IR
EXIT1_IR
The TDOpin is tri-stated in all states except in the SHIFT_IRand
SHIFT_DRstates. The TDOpin is activated at the first falling edge of TCK
after entering either of the shift states and is tri-stated at the first falling
edge of TCKafter leaving either of the shift states.
When the SHIFT_IRstate is activated, TDOis no longer tri-stated, and the
initial state of the instruction register is shifted out on the falling edge of
TCK. TDOcontinues to shift out the contents of the instruction register as
long as the SHIFT_IRstate is active. The TAP controller remains in the
SHIFT_IRstate as long as TMSremains low.
During the SHIFT_IRstate, an instruction code is entered by shifting
data on the TDIpin on the rising edge of TCK. The last bit of the
instruction code must be clocked at the same time that the next state,
EXIT1_IR, is activated. Set TMShigh to activate the EXIT1_IRstate.
Once in the EXIT1_IRstate, TDObecomes tri-stated again. TDOis always
tri-stated except in the SHIFT_IRand SHIFT_DRstates. After an
instruction code is entered correctly, the TAP controller advances to
serially shift test data in one of seven modes (SAMPLE/PRELOAD,
EXTEST,BYPASS,IDCODE,USERCODE,CLAMP,or HIGHZ) that are
described below.
SAMPLE/PRELOAD Instruction Mode
The SAMPLE/PRELOADinstruction mode allows you to take a snapshot of
device data without interrupting normal device operation. You can also
use this instruction to preload the test data into the update registers prior
to loading the EXTESTinstruction. Figure 14–8 shows the capture, shift,
and update phases of the SAMPLE/PRELOADmode.
Altera Corporation
February 2007
14–9
Cyclone II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
