IEEE 1149.1 (JTAG) Boundary-Scan Testing for Cyclone II Devices
During the capture phase, multiplexers preceding the capture registers
select the active device data signals. This data is then clocked into the
capture registers. The multiplexers at the outputs of the update registers
also select active device data to prevent functional interruptions to the
device. During the shift phase, the boundary-scan shift register is formed
by clocking data through capture registers around the device periphery,
then out of the TDOpin. The device can simultaneously shift new test data
into TDIand replace the contents of the capture registers. During the
update phase, data in the capture registers is transferred to the update
registers. This data can then be used in the EXTESTinstruction mode. See
“EXTEST Instruction Mode” on page 14–11 for more information.
Figure 14–9 shows the SAMPLE/PRELOADwaveforms. The
SAMPLE/PRELOADinstruction code is shifted in through the TDIpin. The
TAP controller advances to the CAPTURE_DRstate, then to the SHIFT_DR
state, where it remains if TMSis held low. The data that was present in the
capture registers after the capture phase is shifted out of the TDOpin. New
test data shifted into the TDIpin appears at the TDOpin after being
clocked through the entire boundary-scan register. Figure 14–9 shows
that the instruction code at TDIdoes not appear at the TDOpin until after
the capture register data is shifted out. If TMSis held high on two
consecutive TCKclock cycles, the TAP controller advances to the
UPDATE_DRstate for the update phase.
Figure 14–9. SAMPLE/PRELOAD Shift Data Register Waveforms
TCK
TMS
TDI
TDO
SHIFT_IR
TAP_STATE
SHIFT_DR
EXIT1_IR
SELECT_DR
CAPTURE_DR
EXIT1_DR
After boundary-scan
register data has been
shifted out, data
entered into TDI will
shift out of TDO.
Data stored in
boundary-scan
register is shifted
out of TDO.
UPDATE_IR
UPDATE_DR
Instruction Code
EXTEST Instruction Mode
The EXTESTinstruction mode is used to check external pin connections
between devices. Unlike the SAMPLE/PRELOADmode, EXTESTallows
test data to be forced onto the pin signals. By forcing known logic high
and low levels on output pins, opens and shorts can be detected at pins
of any device in the scan chain.
Altera Corporation
February 2007
14–11
Cyclone II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
