High-Speed I/O Specification
Table 6–87. High-Speed I/O Specifications (Part 2 of 4)
Notes (1), (2)
-5 Speed Grade
-6 Speed Grade
-7 Speed Grade
Symbol
Conditions
Unit
Min Typ Max Min Typ Max Min Typ Max
fHSDR Device
operation
(LVDS,
LVPECL,
HyperTransport
technology)
J = 10
J = 8
J = 7
J = 4
J = 2
300
300
300
300
100
100
840
840
840
840
624
462
300
300
300
300
100
100
840
840
840
840
624
462
300
300
300
300
100
100
840 Mbps
840 Mbps
840 Mbps
840 Mbps
462 Mbps
462 Mbps
J = 1 (LVDS and
LVPECL only)
f
HSDRDPA (LVDS, J=10
300
300
10
1000 300
1000 300
840
840
400
300
300
10
840 Mbps
840 Mbps
LVPECL)
J=8
fHSCLK (Clock
frequency)
(PCML)
W = 1 to 30
400
10
311
MHz
fHSCLK
=
fHSDR / W
fHSDR Device
operation
(PCML)
J = 10
J = 8
J = 7
J = 4
J = 2
J = 1
300
300
300
300
100
100
400
400
400
400
400
250
6400
300
300
300
300
100
100
400
400
400
400
400
250
6400
300
300
300
300
100
100
311 Mbps
311 Mbps
311 Mbps
311 Mbps
300 Mbps
200 Mbps
DPA Run
Length
6400
UI
UI
UI
DPA Jitter
Tolerance(p-p)
all data rates
0.44
0.44
0.44
DPA Minimum
Eye opening
(p-p)
0.56
5
0.56
5
0.56
5
DPA Receiver
Latency
9
9
9
(3)
6–60
Altera Corporation
June 2006
Stratix GX Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
