I/O Structure
Table 4–22 shows the performance specification for DDR SDRAM,
RLDRAM II, QDR SRAM, QDRII SRAM, and ZBT SRAM interfaces in
EP1SGX10 through EP1SGX40 devices. The DDR SDRAM and QDR
SRAM numbers in Table 4–22 have been verified with hardware
characterization with third-party DDR SDRAM and QDR SRAM devices
over temperature and voltage extremes.
Table 4–22. External RAM Support in EP1SGX10 Through EP1SGX40 Devices
Maximum Clock Rate (MHz)
-7 Speed
DDR Memory Type
I/O Standard
-5 Speed Grade -6 Speed Grade
Grade
DDR SDRAM (1), (2)
SSTL-2
200
150
167
133
133
133
DDR SDRAM - side banks (2), (3),
SSTL-2
(4)
RLDRAM II (4)
QDR SRAM (6)
QDRII SRAM (6)
ZBT SRAM (7)
1.8-V HSTL
1.5-V HSTL
1.5-V HSTL
LVTTL
200
167
200
200
(5)
(5)
167
167
200
133
133
167
Notes to Table 4–22:
(1) These maximum clock rates apply if the Stratix GX device uses DQS phase-shift circuitry to interface with DDR
SDRAM. DQS phase-shift circuitry is only available in the top and bottom I/O banks (I/O banks 3, 4, 7, and 8).
(2) For more information on DDR SDRAM, see AN 342: Interfacing DDR SDRAM with Stratix & Stratix GX Devices.
(3) DDR SDRAM is supported on the Stratix GX device side I/O banks (I/O banks 1, 2, 5, and 6) without dedicated
DQS phase-shift circuitry. The read DQS signal is ignored in this mode.
(4) These performance specifications are preliminary.
(5) This device does not support RLDRAM II.
(6) For more information on QDR or QDRII SRAM, see AN 349: QDR SRAM Controller Reference Design for Stratix &
Stratix GX Devices.
(7) For more information on ZBT SRAM, see AN 329: ZBT SRAM Controller Reference Design for Stratix & Stratix GX
Devices.
In addition to six I/O registers and one input latch in the IOE for
interfacing to these high-speed memory interfaces, Stratix GX devices
also have dedicated circuitry for interfacing with DDR SDRAM. In every
Stratix GX device, the I/O banks at the top (I/O banks 3 and 4) and
bottom (I/O banks 7 and 8) of the device support DDR SDRAM up to 200
MHz. These pins support DQS signals with DQ bus modes of ×8, ×16, or
×32.
4–108
Altera Corporation
February 2005
Stratix GX Device Handbook, Volume 1