5CSEA2 参数 Datasheet PDF下载

型号：	5CSEA2
PDF下载：	下载PDF文件查看货源
内容描述：	旋风V器件手册 [Cyclone V Device Handbook]
分类和应用：
文件页数/大小：	74 页 / 1776 K
品牌：	ALTERA [ ALTERA CORPORATION ]

Chapter 1: Overview for Cyclone V Device Family

1–7

Cyclone V Family Plan

Table 1–7 lists the Cyclone V SE, SX, and ST package plan that shows the FPGA GPIO

and HPS I/O counts, the maximum number of transceivers available, and the vertical

migration capability for each device package and density.

Table 1–7. Package Plan for Cyclone V SE, SX, and ST Devices—Preliminary ⁽¹⁾

U484 U672

F896

(31 mm)

(19 mm) (23 mm)

Device

GPIO

—

XCVR

—

HPS I/O

161

—

GPIO

124

—

XCVR

—

HPS I/O

188

—

GPIO

—

XCVR

—

HPS I/O

—

5CSEA2

5CSEA4

—

5CSEA5

—

288

—

188

—

5CSEA6

—

5CSXC4 ⁽²⁾

5CSXC5 ⁽²⁾

5CSXC6 ⁽²⁾

5CSTD5 ⁽³⁾

5CSTD6 ⁽³⁾

Notes to Table 1–7:

—

288

188

—

(1) The arrows indicate the package vertical migration capability. You can also migrate your design across device densities in the same packaging

option if the devices have the same dedicated pins, configuration pins, and power pins.

(2) The transceiver counts listed are for 3-Gbps transceivers.

(3) The transceiver counts listed are for 5-Gbps transceivers.

To verify the pin migration compatibility, use the Pin Migration View window in the

Quartus II software Pin Planner.

For more information about the verifying the pin migration compatibility, refer to the

“I/O Management” chapter in the Quartus II Handbook.

February 2012 Altera Corporation

Cyclone V Device Handbook

Volume 1: Device Overview and Datasheet

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