AV-51002
2017.02.10
1-66
USB Timing Characteristics
Figure 1-11: SD/MMC Timing Diagram
SDMMC_CLK_OUT
Td
SDMMC_CMD & SDMMC_D (Out)
SDMMC_CMD & SDMMC_D (In)
Command/Data Out
Tsu
Th
Command/Data In
Related Information
Booting and Configuration Chapter, Arria V Hard Processor System Technical Reference Manual
Provides more information about CSEL pin settings in the SD/MMC Controller CSEL Pin Settings table.
USB Timing Characteristics
PHYs that support LPM mode may not function properly with the USB controller due to a timing issue. It is recommended that designers use the
MicroChip USB3300 PHY device that has been proven to be successful on the development board.
Table 1-55: USB Timing Requirements for Arria V Devices
Symbol
Description
Min
—
4.4
2
Typ
16.67
—
Max
—
Unit
ns
Tclk
Td
USB CLK clock period
CLK to USB_STP/USB_DATA[7:0] output delay
Setup time for USB_DIR/USB_NXT/USB_DATA[7:0]
Hold time for USB_DIR/USB_NXT/USB_DATA[7:0]
11
ns
Tsu
Th
—
—
ns
1
—
—
ns
Arria V GX, GT, SX, and ST Device Datasheet
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