Intel® MAX® 10 FPGA Device Datasheet
M10-DATASHEET | 2017.12.15
Date
Version
2015.05.04
Changes
May 2015
•
Updated a note to VCCIO for both single supply and dual supply power supplies recommended operating conditions tables.
Note updated: VCCIO for all I/O banks must be powered up during user mode because VCCIO I/O banks are used for the
ADC and I/O functionalities.
•
•
Updated Example for OCT Resistance Calculation after Calibration at Device Power-Up.
Removed a note to BLVDS in Differential I/O Standards Specifications for Intel MAX 10 Devices table. BLVDS is now
supported in Intel MAX 10 single supply devices. Note removed: BLVDS TX is not supported in single supply devices.
•
Updated ADC Performance Specifications for both single supply and dual supply devices.
— Changed the symbol for Operating junction temperature range parameter from TA to TJ.
— Edited sampling rate maximum value from 1000 kSPS to 1 MSPS.
— Added a note to analog input voltage parameter.
— Removed input frequency, fIN specification.
— Updated the condition for DNL specification: External VREF, no missing code. Added DNL specification for condition:
Internal VREF, no missing code.
— Added notes to AC accuracy specifications that the value with prescalar enabled is 6dB less than the specification.
— Added a note to On-Chip Temperature Sensor (absolute accuracy) parameter about the averaging calculation.
Updated ADC Performance Specifications for Intel MAX 10 Single Supply Devices table.
•
•
•
— Added condition for On-Chip Temperature Sensor (absolute accuracy) parameter: with 64 samples averaging.
Updated ADC Performance Specifications for Intel MAX 10 Dual Supply Devices table.
— Updated Digital Supply Voltage minimum value from 1.14 V to 1.15 V and maximum value from 1.26 V to 1.25 V.
Updated fHSCLK and HSIODR specifications for –A7 speed grade in the following tables:
— True PPDS and Emulated PPDS_E_3R Transmitter Timing Specifications for Intel MAX 10 Dual Supply Devices
— True RSDS and Emulated RSDS_E_3R Transmitter Timing Specifications for Intel MAX 10 Dual Supply Devices
— True Mini-LVDS and Emulated Mini-LVDS_E_3R Transmitter Timing Specifications for Intel MAX 10 Dual Supply Devices
— True LVDS Transmitter Timing Specifications for Intel MAX 10 Single Supply Devices
— True LVDS Transmitter Timing Specifications for Intel MAX 10 Dual Supply Devices
— Emulated LVDS_E_3R Transmitter Timing Specifications for Intel MAX 10 Single Supply Devices
— Emulated LVDS_E_3R, SLVS, and Sub-LVDS Transmitter Timing Specifications for Intel MAX 10 Dual Supply Devices
— LVDS Receiver Timing Specifications for Intel MAX 10 Single Supply Devices
— LVDS, TMDS, HiSpi, SLVS, and Sub-LVDS Receiver Timing Specifications for Intel MAX 10 Dual Supply Devices
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Intel® MAX® 10 FPGA Device Datasheet
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