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ALD500RA 参数 Datasheet PDF下载

ALD500RA图片预览
型号: ALD500RA
PDF下载: 下载PDF文件 查看货源
内容描述: 具有精密电压基准精密积分模拟处理器 [PRECISION INTEGRATING ANALOG PROCESSOR WITH PRECISION VOLTAGE REFERENCE]
分类和应用:
文件页数/大小: 12 页 / 97 K
品牌: ALD [ ADVANCED LINEAR DEVICES ]
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FIGURE 1. ALD500R Functional Block Diagram  
C
REF  
R
INT  
C
INT  
-
V
+
REF  
(11)  
V
REF  
(12)  
C
AZ  
R
REF  
C
INT  
(2)  
+
-
C
R
C
= 100K  
= 0.1µF  
C
BUF  
(5)  
C
AZ  
(4)  
REF  
B
REF  
(8)  
REF  
(7)  
REF  
INT  
SW  
SW  
R
R
+
-
SW  
IN  
Buffer  
+
Integrator  
-
+
V
IN  
(14)  
+
-
SW  
SW  
R
R
+
-
Comp1  
-
Level  
Shift  
Comp2  
+
C
(17)  
OUT  
SW  
Az  
SW  
AZ  
+
-
SW  
SW  
SW  
R
R
S
Polarity  
Detection  
DGND  
(18)  
AGND  
(6)  
SW  
SW  
IN  
G
-
V
Analog  
IN  
(13)  
Phase  
Decoding  
Logic  
Switch  
Control  
Signals  
REF  
Control  
Bias  
A
B
V
V
N/C N/C  
SS DD  
(3) (19) (10) (9)  
C
B
C
S
(20)  
(15) (16)  
Control Logic  
I
B
(1)  
GENERAL THEORY OF OPERATION  
GENERAL DESCRIPTION  
The ALD500RAU/ALD500RA/ALD500R are integrating  
dual slope analog processors, designed to operate on ±5V  
power supplies for building precision analog-to-digital  
converters. The ALD500RAU/ALD500RA/ALD500R  
feature specifications suitable for 18 bit/17 bit/16 bit  
resolution conversion, respectively. Together with three  
capacitors, tworesistors, andadigitalcontroller, aprecision  
Analog to Digital converter with auto zero can be  
implemented. The digital controller can be implemented  
by an external microcontroller, under either hardware  
(fixed logic) or software control. For ultra high resolution  
applications, up to 23 bit conversion can be implemented  
with an appropriate digital controller and software.  
Dual-Slope Conversion Principles of Operation  
The basic principle of dual-slope integrating analog to digital  
converter is simple and straightforward. A capacitor, CINT, is  
charged with the integrator from a starting voltage, VX, for a  
fixed period of time at a rate determined by the value of an  
unknown input voltage, which is the subject of measurement.  
Then the capacitor is discharged at a fixed rate, based on an  
external reference voltage, back to VX where the discharge  
time, or deintegration time, is measured precisely. Both the  
integration time and deintegration time are measured by a  
digital counter controlled by a crystal oscillator. It can be  
demonstrated that the unknown input voltage is determined  
by the ratio of the deintegration time and integration time, and  
isdirectlyproportionaltothemagnitudeoftheexternalreference  
voltage.  
The ALD500R series of analog processors accept  
differential inputs and the external digital controller first  
counts the number of pulses at a fixed clock rate that a  
capacitor requires to integrate against an unknown analog  
input voltage, then counts the number of pulses required  
to deintegrate the capacitor against a known internal  
reference voltage. This unknown analog voltage can then  
be converted by the microcontroller to a digital word, which  
is translated into a high resolution number, representing  
an accurate reading. This reading, when ratioed against  
the reference voltage, yields an accurate, absolute voltage  
measurement reading.  
The major advantages of a dual-slope converter are:  
a. Accuracy is not dependent on absolute values of  
integration time tINT and deintegration time tDINT, but is  
dependent on their relative ratios. Long-term clock frequency  
variations will not affect the accuracy. A standard crystal  
controlledclockrunningdigitalcountersisadequatetogenerate  
very high accuracies.  
b. Accuracy is not dependent on the absolute values of  
R
INT and CINT, as long as the component values do not vary  
The ALD500R analog processors consist of on-chip digital  
control circuitry to accept control inputs, integrating buffer  
amplifiers, analog switches, and voltage comparators and  
a highly accurate, ultra-stable voltage reference. It  
functions in four operating modes, or phases, namely auto  
zero, integrate, deintegrate, and integrator zero phases.  
At the end of a conversion, the comparator output goes  
from high to low when the integrator crosses zero during  
deintegration. ALD500R analog processors also provide  
direct logic interface to CMOS logic families.  
through a conversion cycle, which typically lasts less than 1  
second.  
c. Offset voltage values of the analog components, such  
as VX, are cancelled out and do not affect accuracy.  
d. Accuracyofthesystemdependsmainlyontheaccuracy  
and the stability of the voltage reference value.  
2
Advanced Linear Devices  
ALD500RAU/ALD500RA/ALD500R  
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