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AK4387ET 参数 Datasheet PDF下载

AK4387ET图片预览
型号: AK4387ET
PDF下载: 下载PDF文件 查看货源
内容描述: 106分贝192kHz的24位双声道ツヒDAC [106dB 192kHz 24-Bit 2ch ツヒ DAC]
分类和应用: 转换器数模转换器光电二极管
文件页数/大小: 21 页 / 246 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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ASAHI KASEI  
[AK4387]  
„ Zero Detection  
The AK4387 has channel-independent zeros detect function. When the input data at each channel is continuously zeros  
for 8192 LRCK cycles, DZF pin of each channel goes to “H”. DZF pin of each channel immediately goes to “L” if input  
data of each channel is not zero after going DZF “H”. If RSTN bit is “0”, DZF pins of both channels go to “H”. DZF pin  
of both channels go to “L” at 2~3/fs after RSTN bit returns to “1”. Zero detect function can be disabled by DZFE bit. In  
this case, DZF pins of both channels are always “L”. DZFB bit can invert the polarity of DZF pin.  
„ Soft Mute Operation  
Soft mute operation is performed at digital domain. When the SMUTE bit goes to “1”, the output signal is attenuated by  
-
during ATT_DATA ATT transition time (Table 9) from the current ATT level. When the SMUTE bit is returned to  
×
“0”, the mute is cancelled and the output attenuation gradually changes to the ATT level during ATT_DATA ATT  
×
transition time. If the soft mute is cancelled before attenuating to - after starting the operation, the attenuation is  
discontinued and returned to ATT level by the same cycle. The soft mute is effective for changing the signal source  
without stopping the signal transmission.  
SMUTE bit  
(1)  
(1)  
ATT Level  
Attenuation  
(3)  
-
GD  
GD  
(2)  
AOUT  
(4)  
8192/fs  
DZF pin  
Notes:  
(1) ATT_DATA ATT transition time (Table 9). For example, in Normal Speed Mode, this time is 1020LRCK cycles  
×
(1020/fs) at ATT_DATA=255.  
(2) The analog output corresponding to the digital input has a group delay, GD.  
(3) Ifthe soft mute is cancelled before attenuating to - after starting the operation, the attenuation is discontinued and  
returned to ATT level by the same cycle.  
(4) When the input data at each channel is continuously zeros for 8192 LRCK cycles, DZF pin of each channel goes to  
“H”. DZF pin immediately goes to “L” if input data are not zero after going DZF “H”.  
Figure 5. Soft Mute and Zero Detection  
MS0429-E-00  
2005/09  
- 12 -  
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