[AK4359A]
■ Register Control Interface
The functions of the AK4359A can be controlled by registers. Two types of control mode write internal registers. In the
I2C-bus mode, the chip address is determined by the state of the CAD0 pin. In 3-wire mode, the chip address is fixed to
“11”. The RSTB pin = “L” initializes the registers to their default values. Writing “0” to the RSTN bit resets the internal
timing circuit, but the registers are not initialized.
* The AK4359A does not support read command.
* When the AK4359A is in power down mode (RSTB pin = “L”) or the MCLK is not provided, writing to control
register is prohibited.
* When the state of the P/S pin is changed, the AK4359A should be reset by the RSTB pin = “L”.
* In serial control mode, the setting of parallel pins is invalid.
Function
Parallel Control Mode Serial Control Mode
Double sampling mode at 128/192fs
De-emphasis
-
O
O
-
O
O
O
O
O
O
O
SMUTE
Zero Detection
16/20/24bit LSB justified format
TDM256 mode
-
O
-
TDM128 mode
Table 12. Function Table (O: Supported, -: Not supported)
(1) 3-wire Serial Control Mode (I2C pin = “L”)
The 3-wire μP interface pins, CSN, CCLK and CDTI, write internal registers. The data on this interface consists of Chip
Address (2bits, C1/0; fixed to “11”), Read/Write (1bit; fixed to “1”, Write only), Register Address (MSB first, 5bits) and
Control Data (MSB first, 8bits). The AK4359A latches the data on the rising edge of CCLK, so data should clocked in on
the falling edge. The writing of data becomes valid by the rising edge of CSN. The clock speed of CCLK is 5MHz (max).
CSN
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
CCLK
CDTI
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
C1-C0:
R/W:
A4-A0:
D7-D0:
Chip Address (Fixed to “11”)
READ/WRITE (Fixed to “1”, Write only)
Register Address
Control Data
Figure 15. Control I/F Timing
MS1010-E-01
2008/10
- 23 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
