[AK4359A]
■ Reset Function (RSTN bit)
When the RSTN bit = “0”, internal circuit of DAC is powered down but the registers are not initialized. The analog
outputs settle to VCOM voltage and the DZF pins go “H” at DZFB bit = “0”.
Figure 13 shows the example of reset by RSTN bit. When RSTN bit = “0”, pop noise is reduced at no clock state.
RSTN bit
3~4/fs (5)
2~3/fs (5)
Internal
RSTN bit
Internal
State
Normal Operation
Digital Block
Normal Operation
D/A In
(Digital)
“0 ” dat a
GD
GD
(1)
(1)
(3)
(2)
(3)
D/A Out
(Analog)
2/fs(4)
DZF
(6)
Notes:
(1) The analog output corresponding to digital input has group delay (GD).
(2) Analog outputs settle to VCOM voltage.
(3) Small pop noise occurs at the edges(“↑ ↓”) of the internal timing of RSTN bit. This noise is output even if “0”
data is input.
(4) The DZF pins change to “H” when the RSTN bit becomes “0”, and return to “L” at 2/fs after RSTN bit becomes
“1”.
(5) There is a delay, 3~4/fs from RSTN bit “0” to the internal RSTN bit “0”, and 2~3/fs from RSTN bit “1” to the
internal RSTN bit “1”.
(6) Mute the analog output externally if click noise (3) and Hi-Z (2) adversely affect system performance
Figure 13. Reset Sequence Example (DZFB bit = “0”)
MS1010-E-01
2008/10
- 21 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
