[AK4359A]
■ System Reset
The AK4359A should be reset once by bringing the RSTB pin = “L” upon power-up. The AK4359A is powered up and
the internal timing starts clocking by LRCK “↑” after exiting reset and power down state by MCLK. The AK4359A is in
the power-down mode until MCLK and LRCK are input.
■ Power ON/OFF timing
All DACs are placed in the power-down mode by bringing the RSTB pin “L” and the registers are initialized. the analog
outputs go to VCOM. As some click noise occurs at the edge of RSTB signal, the analog output should be muted
externally if the click noise influences system application.
Each DAC can be powered down by setting each power-down bit (PW4-1) to “0”. In this case, the registers are not
initialized and the corresponding analog outputs go to VCOM. As some click noise occurs at the edge of RSTB signal, the
analog output should be muted externally if click noise aversely affect system perfoemance.
Power
(1)
RSTB pin
Internal
State
Normal Operation
Reset
DAC In
(Digital)
“0”data
“0”data
GD
(2)
GD
(3)
(4)
(4)
DAC Out
(Analog)
(3)
(6)
DZFL/DZFR
External
Mute
(5)
Mute ON
Mute ON
Notes:
(1) After AVDD and DVDD are powered-up, the PDN pin should be “L” for 150ns.
(2) The analog output corresponding to digital input has group delay (GD).
(3) Analog outputs are VCOM in power-down mode.
(4) Click noise occurs at the edge of RSTN signal. This noise is output even if “0” data is input.
(5) Mute the analog output externally if click noise (3) adversely affect system performance
The timing example is shown in this figure.
(6) DZFL/R pins are “L” in the reset state (RSTB pin = “L”). (DZFB bit = “0”)
Figure 12. Power-down/up Sequence Example
MS1010-E-01
2008/10
- 20 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
