[AK4359A]
TDM0-1: TDM Mode Select
Mode
Normal
TDM256
TDM128
TDM1 TDM0
BICK
SDTI
1-4
1
Sampling Speed
Normal, Double, Quad Speed
Normal Speed
0
0
1
0
1
1
32fs∼
256fs fixed
128fs fixed
1-2
Normal, Double Speed
ACKS: Master Clock Frequency Auto Setting Mode Enable
0: Disable, Manual Setting Mode
1: Enable, Auto Setting Mode
Master clock frequency is detected automatically at ACKS bit “1”. In this case, the setting of DFS1-0
bits is ignored. When this bit is “0”, DFS1-0 bits set the sampling speed mode.
Addr Register Name
01H Control 2
Default
D7
0
D6
0
D5
SLOW
0
D4
DFS1
0
D3
DFS0
0
D2
DEM1
0
D1
D0
DEM0 SMUTE
0
0
1
0
SMUTE: Soft Mute Enable
0: Normal operation
1: DAC outputs soft-muted
DEM1-0: De-emphasis Response (Table 9)
Initial: “01”, OFF
DFS1-0: Sampling speed control (Table 1)
00: Normal speed
01: Double speed
10: Quad speed
When changing between Normal/Double Speed Mode and Quad Speed Mode, some click noise occurs.
SLOW: Slow Roll-off Filter Enable
0: Sharp Roll-off Filter
1: Slow Roll-off Filter
Adr Register Name
D7
PW4
1
D6
PW3
1
D5
PW2
1
D4
0
0
D3
0
0
D2
DZFB
0
D1
PW1
1
D0
0
0
Speed & Power Down Control
02H
Default
PW1: Power-down control (0: Power-down, 1: Power-up)
PW1: Power down control of DAC1
This bit is duplicated into D1 of 00H.
DZFB: Inverting Enable of DZF
0: DZF goes “H” at Zero Detection
1: DZF goes “L” at Zero Detection
PW4-2: Power-down control (0: Power-down, 1: Power-up)
PW2: Power down control of DAC2
PW3: Power down control of DAC3
PW4: Power down control of DAC4
All sections are powered-down by PW1=PW2=PW3=PW4= “0”.
MS1010-E-01
2008/10
- 27 -