ASAHI KASEI
[AK4115]
Register Definitions
Reset & Initialize
Addr
Register Name
D7
CS12
R/W
0
D6
BCU
R/W
1
D5
CM1
R/W
0
D4
D3
D2
D1
D0
RSTN
R/W
1
00H CLK & Power Down Control
CM0 OCKS1 OCKS0 PWN
R/W
0
R/W
Default
R/W
0
R/W
0
R/W
1
RSTN: Timing Reset & Register Initialize
0: Reset & Initialize
1: Normal Operation (Default)
PWN: Power Down
0: Power Down
1: Normal Operation (Default)
OCKS1-0: Master Clock Frequency Select (See Table 9)
CM1-0: Master Clock Operation Mode Select (See Table 3 and Table 5)
BCU: Block start & C/U Output Mode when BCU_IO bit is “1”
0: B, C and U pins output “L”.
1: B, C, and U pins output the data recovered from biphase signal. (Default)
When BCU_IO bit is “0”, BCU bit is ignored.
CS12: Channel Status Select
0: Channel 1 (Default)
1: Channel 2
Selects which channel status is used to derive C-bit buffers, AUDION, PEM, FS3, FS2, FS1, FS0,
Pc and Pd. The de-emphasis filter is controlled by channel 1 in the Parallel Mode.
Format & De-emphasis Control
Addr Register Name
D7
AES3
R/W
0
D6
DIF2
R/W
1
D5
DIF1
R/W
1
D4
D3
D2
D1
D0
01H Format & De-em Control
DIF0 DEAU DEM1 DEM0 ACKS
R/W
0
R/W
Default
R/W
1
R/W
0
R/W
1
R/W
0
ACKS: Master clock Auto Setting Mode
0: Disable (Default)
1: Enable
DEM1-0: 32, 44.1, 48kHz De-emphasis Control (See Table 18)
DEAU: De-emphasis Auto Detect Enable
0: Disable
1: Enable (Default)
DIF2-0, AES3: Audio Data Format Control (See Table 28)
MS0573-E-00
2006/12
- 49 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
