ASAHI KASEI
[AK4115]
D0
Mask Control for INT1
Addr
Register Name
D7
D6
D5
D4
D3
D2
D1
05H INT1 MASK
MQIT1 MAUT1 MCIT1 MULK1 MVRX1 MSTC1 MAUD MPAR1
R/W
Default
R/W
1
R/W
0
R/W
1
R/W
1
R/W
1
R/W
1
R/W
0
R/W
1
MPAR1: Mask enable for PAR bit
0: Mask disable
1: Mask enable (Default)
MAUD1:Mask enable for AUDION bit
0: Mask disable (Default)
1: Mask enable
MSTC1: Mask enable for STC bit
0: Mask disable
1: Mask enable (Default)
MVRX1:Mask enable for VRX bit
0: Mask disable
1: Mask enable (Default)
MULK1:Mask enable for UNLCK bit
0: Mask disable
1: Mask enable (Default)
MCIT1: Mask enable for CINT bit
0: Mask disable
1: Mask enable (Default)
MAUT1:Mask enable for AUTO bit
0: Mask disable (Default)
1: Mask enable
MQIT1: Mask enable for QINT bit
0: Mask disable
1: Mask enable (Default)
When mask is set to “1”, corresponding event does not affect INT1 pin operation.
MS0573-E-00
2006/12
- 52 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
