44 43 42 41 40 39 38 37 36 35 34
GND
1
33
32
31
30
29
28
27
26
25
24
23
GND
2
V
V
A
CC
CC
3
FM_NODE [1]–
FM_NODE [1]+
TO_NODE[4]+
TO_NODE[4]–
4
Agilent
HDMP-0452
V
HS[1]
CC
5
V
HS[4]
CC
6
TO_NODE [1]–
TO_NODE [1]+
GND
FM_NODE[4]+
FM_NODE[4]–
nnnn-nnn Rz.zz
S YYWW
7
8
V
HS[0]
CC
FM_NODE [0]–
FM_NODE [0]+
GND
9
TO_NODE[0]–
TO_NODE[0]+
GND
10
11
12 13 14 15 16 17 18 19 20 21 22
nnnn-nnn = WAFER LOT – BUILD NUMBER
Rz.zz = DIE REVISION
S = SUPPLIER CODE
YYWW = DATE CODE (YY = YEAR, WW = WORK WEEK)
COUNTRY = COUNTRY OF MANUFACTURE
(ON BACK SIDE)
Figure 2. HDMP-0452 package layout and marking, top view.
I/O Type Definitions
I/O Type
I-LVTTL
O-LVTTL
HS_OUT
HS_IN
C
Definition
LVTTL Input
LVTTL Output
High-Speed Output, LVPECL Compatible
High-Speed Input
External Circuit Node
Power Supply or Ground
S
4
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
