HDMP-0452 AC Electrical Specifications
T
A
= 0°C to +70°C, V
CC
= 3.15 V to 3.45 V
Symbol
t
delay1
t
delay2
t
r,LVTTLin
t
f,LVTTLin
t
rs,HS_OUT
t
fs,HS_OUT
t
rd,HS_OUT
t
fd,HS_OUT
V
IP,HS_IN
V
OP,HS_OUT
Parameter
Total Loop Latency from FM_NODE[0] to TO_NODE[0]
Per Cell Latency from FM_NODE[4] to TO_NODE[0]
Input LVTTL Rise Time Requirement, 0.8 V to 2.0 V
Input LVTTL Fall Time Requirement, 2.0 V to 0.8 V
HS_OUT Single-Ended Rise Time, 20%-80%
HS_OUT Single-Ended Fall Time, 20%-80%
HS_OUT Differential Rise Time, 20%-80%
HS_OUT Differential Fall Time, 20%-80%
HS_IN Input Peak-to-Peak Required Differential Voltage Range
HS_OUT Output Pk-Pk Diff. Voltage Range (Z0 = 75 Ohm, Fig. 9)
Units
ns
ns
ns
ns
ps
ps
ps
ps
mV
mV
200
1100
Min.
Typ.
4.0
0.8
2
2
200
200
200
200
1200
1400
350
350
350
350
2000
2000
Max.
HDMP-0452 Power Dissipation and Thermal Resistance
T
A
= 0°C to +70°C, V
CC
= 3.15 V to 3.45 V
Symbol
P
D
Θ
jc
Parameter
Power Dissipation
Thermal Resistance, Junction to Case
Units
mW
°C/W
Typ.
660
7
Max.
950
HDMP-0452 Output Jitter Characteristics
T
A
= 0°C to +70°C, V
CC
= 3.15 V to 3.45 V
Symbol
RJ
DJ
Parameter
Random Jitter at TO_NODE pins (1 sigma rms)
Deterministic Jitter at TO_NODE pins (pk-pk)
Units
ps
ps
Typ.
5
20
Max.
Please refer to Figures 6 and 7 for jitter measurement setup information.
HDMP-0452 Locking Characteristics
T
A
= 0°C to +70°C, V
CC
= 3.15 V to 3.45 V
Parameter
Bit Sync Time (phase lock)
Frequency Lock at Powerup
Units
bits
µs
Max.
2500
500
8
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