T9000
Preliminary Data Sheet
November 2000
ISDN Network Termination Node (NTN) Device
6 Functional Modules (continued)
960 kHz 80C32 clock:
Longest: 1/960 k x 65536 x 127 = 8.670 s
Shortest: 1/960 k x 65536 x 1 = 68.27 ms
6.8 Watchdog Timer
15.36 MHz 80C32 clock:
A watchdog timer is implemented using a 16-bit pre-
scaler clocked by the 80C32 microcontroller clock. The
prescaler drives a programmable up-counter that pro-
vides an additional count multiplication selection and is
programmable from 1 to 127. Upon overflow of the up-
counter, the entire chip is reset (including the 80C32).
Given the 16-bit prescaler (65536 count) and a 1 to 127
multiplication selection, the watchdog time-out ranges
can be calculated as follows:
Longest: 1/15.36 M x 65536 x 127 = 541.9 ms
Shortest: 1/15.36 M x 65536 x 1 = 4.267 ms
Note that programming the count multiplication register
to 0 initiates an immediate reset of the chip. This is a
convenient way to get the 80C32 to do a full system
reset.
Table 16 lists the watchdog timer control register bits.
Table 16. WDT: Microcontroller Watchdog Timer Control (0x04)
Reg
R/W
Bit 7
WDTE
0
Bit 6
WDT6
1
Bit 5
WDT5
1
Bit 4
WDT4
1
Bit 3
WDT3
1
Bit 2
WDT2
1
Bit 1
WDT1
1
Bit 0
WDT0
1
WDT
R/W
RESET Default
Bit #
Symbol
Name/Description
7
WDTE
Watchdog Timer Enable. Enables the watchdog timer function.
0: Watchdog timer disabled.
1: Watchdog timer enabled.
6:0
WDT[6:0]
Watchdog Timer Value. Multiplication selection for the watchdog timer.
22
Lucent Technologies Inc.
AGERE [ AGERE SYSTEMS ]
