T9000
Preliminary Data Sheet
November 2000
ISDN Network Termination Node (NTN) Device
6 Functional Modules (continued)
6.7 Clock Generator
This module contains the crystal oscillator, from which it derives clocks to drive the rest of the modules. The micro-
controller can execute a self-powerdown by selecting the clock it receives. At powerup, the microcontroller clock
defaults to 15.36 MHz. The microcontroller can slow down its own clock by writing to the UPCK register. When the
microcontroller is stopped (UPCK[2:0] = 000), any interrupt will immediately set UPCK = 15.36 MHz.
Table 15. UPCK: Microcontroller Clock Control Register (0x03)
Reg
R/W
Bit 7
CLKOE
1
Bit 6
—
Bit 5
—
Bit 4
—
Bit 3
—
Bit 2
UPCK2
1
Bit 1
UPCK1
1
Bit 0
UPCK0
1
UPCK
R/W
RESET Default
0
0
0
0
Bit # Symbol
Name/Description
External Microcontroller Clock Output Enable. Controls the output driver for the CLKO
signal.
7
CLKOE
0: Output driver is 3-stated.
1: Output driver is enabled.
Reserved. Program to 0.
—
6—3
Microcontroller Clock Value. Programs the frequency of the microcontroller clock as
follows:
2—0 UPCK[2:0]
000: Stops clock (clock is restarted on detection of interrupt).
001: 0.96 MHz.
010: 1.92 MHz.
011: 3.84 MHz.
100: 7.68 MHz.
101: 15.36 MHz.
110: 15.36 MHz.
111: 15.36 MHz.
Lucent Technologies Inc.
21
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