AD5940
Data Sheet
Calibration Data Lock Register—CALDATLOCK
Address 0x00002230, Reset: 0xDE87A5A0, Name: CALDATLOCK
Table 29. Bit Descriptions for CALDATLOCK Register
Bits
Bit Name Settings
Description
Reset
Access
[31:0] Key
Password for the calibration data registers. This password prevents the
overwriting of data after the calibration phase.
0xDE87A5A0 R/W
Write this value to unlock the calibration registers.
0xDE87A5AF
DAC Gain Register—DACGAIN
Address 0x00002260, Reset: 0x00000800, Name: DACGAIN
Protected by CALDATLOCK. Valid for all settings of HSDACCON, Bit 12 and HSDACCON, Bit 0.
Table 30. Bit Descriptions for DACGAIN
Bits
Bit Name
Reserved
Value
Settings
Description
Reset
0x0
Access
[31:12]
[11:0]
Reserved.
R
High speed DAC gain correction factor. Unsigned number.
0x800
R/W
0x000 Maximum negative gain adjustment occurs.
0x800 No gain adjustment.
0xFFF Maximum positive gain adjustment occurs.
DAC Offset with Attenuator Enabled (Low Power Mode) Register—DACOFFSETATTEN
Address 0x00002264, Reset: 0x00000000, Name: DACOFFSETATTEN
The LSB adjustment is typically 4.9 μV for HSDACCON. Bit 12 = 1 and HSDACCON, Bit 0 = 1. The LSB adjustment is typically 24.7 μV
for HSDACCON, Bit 12 = 1 and HSDACON, Bit 0 = 0.
Table 31. Bit Descriptions for DACOFFSETATTEN
Bits
[31:12] Reserved
[11:0] Value
Bit Name Settings Description
Reset Access
Reserved.
0x0
0x0
R
DAC offset correction factor. This value is a signed number represented in twos
complement format with 0.5 LSB precision. Used when the attenuator is enabled.
R/W
0x7FF 210 − 0.5. Maximum positive adjustment that results in a positive full scale/2 − 0.5 LSB
adjustment.
0x001 0.5. Results in a 0.5 LSB adjustment.
0x000 0. No offset adjustment.
0xFFF −0.5. Results in a −0.5 LSB adjustment.
0x800 −210. Maximum negative adjustment that results in negative full scale/2 adjustment.
DAC Offset with Attenuator Disabled (Low Power Mode Register)—DACOFFSET
Address 0x00002268, Reset: 0x00000000, Name: DACOFFSET
The LSB adjustment is typically 197.7 μV for HSDACCON, Bit 12 = 0 and HSDACCON, Bit 0 = 0. The LSB adjustment is typically
39.5 μV for HSDACCON, Bit 12 = 0 and HSDACCON, Bit 0 = 1.
Table 32. Bit Descriptions for DACOFFSET Register
Bits
[31:12] Reserved
[11:0] Value
Bit Name Settings Description
Reset Access
Reserved.
0x0
0x0
R
R/W
DAC offset correction factor. This value is a signed number represented in twos
complement format with 0.5 LSB precision. Used when the attenuator is disabled.
0x7FF 210 − 0.5. Maximum positive adjustment that results in a positive full scale/2 − 0.5 LSB
adjustment.
0x001 0.5. Results in a 0.5 LSB adjustment.
0x000 0. No offset adjustment.
0xFFF −0.5. Results in a −0.5 LSB adjustment.
0x800 −210. Maximum negative adjustment that results in negative full scale/2 adjustment.
Rev. 0 | Page 44 of 130
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