Data Sheet
AD5940
DAC Offset with Attenuator Enabled (High Speed Mode Register)—DACOFFSETATTENHS
Address 0x000022B8, Reset: 0x00000000, Name: DACOFFSETATTENHS
Protected by CALDATLOCK. The LSB adjustment is typically 4.9 μV for HSDACCON, Bit 12 = 1 and HSDACCON, Bit 0 = 1. The LSB
adjustment is typically 24.7 μV for HSDACCON, Bit 12 = 1 and HSDACCON, Bit 0 = 0.
Table 33. Bit Descriptions for DACOFFSETATTENHS Register
Bits
[31:12] Reserved
[11:0] Value
Bit Name Settings Description
Reset Access
Reserved.
0x0
0x0
R
R/W
DAC offset correction factor. This value is a signed number represented in twos
complement format with 0.5 LSB precision. Used when the attenuator is enabled.
0x7FF 210 − 0.5. Maximum positive adjustment that results in a positive full scale/2 − 0.5 LSB
adjustment.
0x001 0.5. Results in a 0.5 LSB adjustment.
0x000 0. No offset adjustment.
0xFFF −0.5. Results in a −0.5 LSB adjustment.
0x800 −210. Maximum negative adjustment that results in negative full scale/2 adjustment.
DAC Offset with Attenuator Disabled (High Speed Mode Register)—DACOFFSETHS
Address 0x000022BC, Reset: 0x00000000, Name: DACOFFSETHS
Protected by CALDATLOCK. The LSB adjustment is typically 197.7 μV for HSDACCON, Bit 12 = 0 and HSDACCON, Bit 0 = 0. The LSB
adjustment is typically 39.5 μV for HSDACCON, Bit 12 = 0 and HSDACCON, Bit 0 = 1.
Table 34. Bit Descriptions for DACOFFSETHS
Bits
[31:12] Reserved
[11:0] Value
Bit Name Settings Description
Reset Access
Reserved.
0x0
0x0
R
DAC offset correction factor. This value is a signed number represented in twos
complement format with 0.5 LSB precision. Used when the attenuator is disabled.
R/W
0x7FF 210 − 0.5. Maximum positive adjustment that results in a positive full scale/2 − 0.5 LSB
adjustment.
0x001 0.5. Results in a 0.5 LSB adjustment.
0x000 0. No offset adjustment.
0xFFF −0.5. Results in a −0.5 LSB adjustment.
0x800 −210. Maximum negative adjustment that results in negative full scale/2 adjustment.
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