ADV7390/ADV7391/ADV7392/ADV7393
Table 79. 10-Bit 625i YCrCb In (EAV/SAV), YPrPb Out
Subaddress Setting Description
Table 82. 10-Bit 625i YCrCb In (EAV/SAV), RGB Out
Subaddress Setting Description
0x17
0x00
0x01
0x80
0x02
0x1C
0x00
0x11
Software reset.
0x17
0x00
0x01
0x02
0x02
0x1C
0x00
0x10
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
All DACs enabled. PLL enabled (16×).
SD input mode.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
RGB output enabled. RGB output sync
enabled.
0x82
0x88
0xC1
0x10
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x80
0x82
0x11
0xC1
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
10-bit input enabled.
0x88
0x8C
0x8D
0x8E
0x8F
0x10
0xCB
0x8A
0x09
0x2A
10-bit input enabled.
PAL FSC value.
Table 80. 10-Bit 625i YCrCb In, YPrPb Out
Subaddress Setting Description
PAL FSC value.
PAL FSC value.
0x17
0x00
0x01
0x80
0x02
0x1C
0x00
0x11
Software reset.
PAL FSC value.
All DACs enabled. PLL enabled (16×).
SD input mode.
Table 83. 10-Bit 625i YCrCb In, RGB Out
Subaddress Setting Description
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x17
0x00
0x01
0x02
0x02
0x1C
0x00
0x10
Software reset.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
All DACs enabled. PLL enabled (16×).
SD input mode.
0x88
0x8A
0x10
0x0C
10-bit input enabled.
RGB output enabled. RGB output sync
enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x80
0x82
0x11
0xC1
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
PAL FSC value.
PAL FSC value.
PAL FSC value.
PAL FSC value.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x88
0x8A
0x10
0x0C
10-bit input enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
Table 81. 10-Bit 625i YCrCb In, CVBS/Y-C Out
Subaddress Setting Description
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
PAL FSC value.
PAL FSC value.
PAL FSC value.
PAL FSC value.
0x17
0x00
0x01
0x80
0x02
0x1C
0x00
0x11
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Table 84. 16-Bit 625i YCrCb In, YPrPb Out
Subaddress Setting Description
0x17
0x00
0x01
0x80
0x82
0xC3
Pixel Data Valid. CVBS/S-Video Out.
SSAF PrPb Filter Enabled. Active Video
Edge Control Enabled.
0x02
0x1C
0x00
0x11
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
0x88
0x8A
0x10
0x0C
10-bit input enabled.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
PAL FSC value.
PAL FSC value.
PAL FSC value.
PAL FSC value.
0x88
0x8A
0x08
0x0C
16-bit input enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
PAL FSC value.
PAL FSC value.
PAL FSC value.
PAL FSC value.
Rev. 0 | Page 88 of 96
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