ADV7390/ADV7391/ADV7392/ADV7393
Table 73. 16-Bit 525i RGB In, RGB Out
Table 76. 8-Bit 625i YCrCb In, YPrPb Out
Subaddress Setting Description
Subaddress Setting Description
0x17
0x00
0x01
0x02
0x02
0x1C
0x00
0x10
Software reset.
0x17
0x00
0x01
0x80
0x02
0x1C
0x00
0x11
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
All DACs enabled. PLL enabled (16×).
SD input mode.
RGB output enabled. RGB output sync
enabled.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x80
0x82
0x10
0xC9
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
0x82
0x8A
0xC1
0x0C
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x87
0x88
0x8A
0x80
0x08
0x0C
RGB input enabled.
16-bit input enabled.
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
PAL FSC value.
PAL FSC value.
PAL FSC value.
PAL FSC value.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
Table 74. 8-Bit 625i YCrCb In (EAV/SAV), YPrPb Out
Subaddress Setting Description
Table 77. 8-Bit 625i YCrCb In (EAV/SAV), RGB Out
Subaddress Setting Description
0x17
0x00
0x01
0x80
0x02
0x1C
0x00
0x11
Software reset.
0x17
0x00
0x01
0x02
0x02
0x1C
0x00
0x10
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
All DACs enabled. PLL enabled (16×).
SD input mode.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
RGB output enabled. RGB output sync
enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x80
0x82
0x11
0xC1
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
PAL FSC value.
PAL FSC value.
PAL FSC value.
PAL FSC value.
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
PAL FSC value.
PAL FSC value.
PAL FSC value.
PAL FSC value.
Table 75. 8-Bit 625i YCrCb In (EAV/SAV), CVBS/Y-C Out
Subaddress Setting Description
Table 78. 8-Bit 625i YCrCb In, RGB Out
Subaddress Setting Description
0x17
0x00
0x01
0x80
0x02
0x1C
0x00
0x11
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
0x17
0x00
0x01
0x02
0x02
0x1C
0x00
0x10
Software reset.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
All DACs enabled. PLL enabled (16×).
SD input mode.
0x82
0xC3
Pixel data valid. CVBS/S-Video out.
SSAF PrPb filter enabled. Active video
edge control enabled.
RGB output enabled. RGB output sync
enabled.
0x80
0x82
0x11
0xC1
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
PAL FSC value.
PAL FSC value.
PAL FSC value.
PAL FSC value.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x8A
0x0C
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
PAL FSC value.
PAL FSC value.
PAL FSC value.
PAL FSC value.
Rev. 0 | Page 87 of 96
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