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ADV7393BCPZ-REEL 参数 Datasheet PDF下载

ADV7393BCPZ-REEL图片预览
型号: ADV7393BCPZ-REEL
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗,芯片级,10位标清/高清视频编码器 [Low Power, Chip Scale 10-Bit SD/HD Video Encoder]
分类和应用: 编码器
文件页数/大小: 96 页 / 2253 K
品牌: ADI [ ADI ]
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ADV7390/ADV7391/ADV7392/ADV7393  
(YPrPb/RGB) analog outputs in either standard-definition (SD)  
or high-definition (HD) video formats.  
DETAILED FEATURES  
High definition (HD) programmable features  
(720p/1080i/1035i)  
4× oversampling (297 MHz)  
Internal test pattern generator  
Color and black bar, hatch, flat field/frame  
Fully programmable YCrCb to RGB matrix  
Gamma correction  
Optimized for low power operation, occupying a minimal  
footprint and requiring few external components, these  
encoders are ideally suited to portable and power sensitive  
applications requiring TV-Out functionality. Cable detection  
and DAC auto power-down features ensure that power  
consumption is kept to a minimum.  
Programmable adaptive filter control  
Programmable sharpness filter control  
CGMS (720p/1080i) and CGMS Type B (720p/1080i)  
Dual data rate (DDR) input support  
EIA/CEA-861B compliance support  
Enhanced definition (ED) programmable features  
(525p/625p)  
The ADV7390/ADV7391 have an 8-bit video input port that  
supports SD video formats over a SDR interface and HD video  
formats over a DDR interface.  
The ADV7392/ADV7393 have a 16-bit video input port that  
can be configured in a variety of ways. SD RGB input is  
supported.  
8× oversampling (216 MHz output)  
Internal test pattern generator  
Color and black bar, hatch, flat field/frame  
Individual Y and PrPb output delay  
Gamma correction  
Programmable adaptive filter control  
Fully programmable YCrCb to RGB matrix  
Undershoot limiter  
Macrovision Rev 1.2 (525p/625p)  
CGMS (525p/625p) and CGMS Type B (525p)  
Dual data rate (DDR) input support  
EIA/CEA-861B compliance support  
Standard definition (SD) programmable features  
16× oversampling (216 MHz)  
All members of the family support embedded EAV/SAV timing  
codes, external video synchronization signals and the I2C and  
SPI communication protocols.  
Table 1 lists the video standards directly supported by the  
ADV739x family.  
Table 1. Standards Directly Supported by the ADV739x1  
Frame  
Clock Input  
(MHz)  
Resolution  
720 × 240  
720 × 288  
720 × 480  
I/P2 Rate (Hz)  
Standard  
P
P
I
59.94  
50  
29.97  
27  
27  
27  
ITU-R  
BT.601/656  
720 × 576  
720 × 480  
720 × 576  
I
I
I
25  
27  
ITU-R  
BT.601/656  
NTSC Square  
Pixel  
PAL Square  
Pixel  
Internal test pattern generator  
Color and black bar  
Controlled edge rates for start and end of active video  
Individual Y and PrPb output delay  
Undershoot limiter  
29.97  
25  
24.54  
29.5  
720 × 483  
720 × 483  
720 × 483  
720 × 576  
720 × 483  
720 × 576  
1920 × 1035  
1920 × 1035  
1280 × 720  
P
P
P
P
P
P
I
59.94  
59.94  
59.94  
50  
59.94  
50  
30  
29.97  
60, 50, 30,  
25, 24  
27  
27  
27  
27  
27  
27  
74.25  
74.1758  
74.25  
SMPTE 293M  
BTA T-1004  
Gamma correction  
Digital noise reduction (DNR)  
ITU-R BT.1358  
ITU-R BT.1358  
ITU-R BT.1362  
ITU-R BT.1362  
SMPTE 240M  
SMPTE 240M  
SMPTE 296M  
Multiple chroma and luma filters  
Luma-SSAF™ filter with programmable gain/attenuation  
PrPb SSAF™  
Separate pedestal control on component and  
composite/S-Video output  
VCR FF/RW sync mode  
Macrovision Rev 7.1.L1  
Copy generation management system (CGMS)  
Wide screen signaling (WSS)  
Closed captioning  
I
P
1280 × 720  
P
23.97,  
74.1758  
SMPTE 296M  
59.94, 29.97  
1920 × 1080  
1920 × 1080  
1920 × 1080  
1920 × 1080  
1920 × 1080  
I
I
P
P
P
30, 25  
29.97  
30, 25, 24  
23.98, 29.97 74.1758  
24 74.25  
74.25  
74.1758  
74.25  
SMPTE 274M  
SMPTE 274M  
SMPTE 274M  
SMPTE 274M  
ITU-R BT.709-  
5
EIA/CEA-861B compliance support  
GENERAL DESCRIPTION  
The ADV7390/ADV7391/ADV7392/ADV7393 are a family of  
high speed, digital-to-analog video encoders on single  
monolithic chips. Three 2.7 V/3.3 V 10-bit video DACs provide  
1 Other standards are supported in the ED/HD nonstandard timing mode.  
2 I = interlaced, P = progressive.  
support for composite (CVBS), S-Video (YC), or component  
Rev. 0 | Page 4 of 96  
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