ADV7390/ADV7391/ADV7392/ADV7393
TABLE OF CONTENTS
Features .............................................................................................. 1
SD Subcarrier Frequency Lock, Subcarrier Reset, and Timing
Reset............................................................................................. 46
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Detailed Features .............................................................................. 4
General Description......................................................................... 4
Specifications..................................................................................... 5
Power Supply Specifications........................................................ 5
Input Clock Specifications .......................................................... 5
Analog Output Specifications..................................................... 5
Digital Input/Output Specifications........................................... 6
MPU Port Timing Specifications ............................................... 6
Digital Timing Specifications ..................................................... 7
Video Performance Specifications ............................................. 8
Power Specifications .................................................................... 8
Timing Diagrams.............................................................................. 9
Absolute Maximum Ratings.......................................................... 15
Thermal Resistance .................................................................... 15
ESD Caution................................................................................ 15
Pin Configurations and Function Descriptions ......................... 16
Typical Performance Characteristics ........................................... 18
MPU Port Description................................................................... 23
I2C Operation.............................................................................. 23
SPI Operation.............................................................................. 24
Register Map.................................................................................... 25
Register Programming............................................................... 25
Subaddress Register (SR7 to SR0) ............................................ 25
ADV7390/ADV7391 Input Configuration ................................. 41
Standard Definition.................................................................... 41
Enhanced Definition/High Definition .................................... 41
Enhanced Definition (At 54 MHz) .......................................... 41
ADV7392/ADV7393 Input Configuration ................................. 42
Standard Definition.................................................................... 42
Enhanced Definition/High Definition .................................... 43
Enhanced Definition (At 54 MHz) .......................................... 43
Output Configuration.................................................................... 44
Features ............................................................................................ 45
Output Oversampling................................................................ 45
ED/HD Nonstandard Timing Mode........................................ 45
ED/HD Timing Reset ................................................................ 46
SD VCR FF/RW Sync ................................................................ 47
Vertical Blanking Interval ......................................................... 47
SD Subcarrier Frequency Registers.......................................... 47
SD NonInterlaced Mode............................................................ 48
SD Square Pixel Mode ............................................................... 48
Filters............................................................................................ 49
ED/HD Test Pattern Color Controls ....................................... 50
Color Space Conversion Matrix ............................................... 50
SD Luma and Color Control..................................................... 51
SD Hue Adjust Control.............................................................. 52
SD Brightness Detect ................................................................. 52
SD Brightness Control............................................................... 52
SD Input Standard Auto Detection.......................................... 52
Double Buffering........................................................................ 53
Programmable DAC Gain Control.......................................... 53
Gamma Correction.................................................................... 53
ED/HD Sharpness Filter and Adaptive Filter Controls......... 55
ED/HD Sharpness Filter and Adaptive Filter Application
Examples...................................................................................... 56
SD Digital Noise Reduction...................................................... 57
SD Active Video Edge Control................................................. 59
External Horizontal and Vertical
Synchronization Control........................................................... 60
Low Power Mode........................................................................ 61
Cable Detection .......................................................................... 61
DAC Auto Power-Down............................................................ 61
Pixel and Control Port Readback............................................. 61
Reset Mechanisms...................................................................... 61
Printed Circuit Board Layout and Design .................................. 62
DAC Configurations.................................................................. 62
Video Output Buffer and Optional Output Filter.................. 62
Printed Circuit Board (PCB) Layout ....................................... 63
Typical Application Circuit....................................................... 65
Appendix 1–Copy Generation Management System ................ 66
SD CGMS .................................................................................... 66
ED CGMS.................................................................................... 66
HD CGMS................................................................................... 66
CGMS CRC Functionality ........................................................ 66
Appendix 2–SD Wide Screen Signaling ...................................... 69
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