ADSP-21062/ADSP-21062L
CLKIN
tSDRLC
tDMARLL
tSDRHC
tWDR
tDMARH
DMARx
DMAGx
tHDGC
tDDGL
tWDGL
tWDGH
TRANSFERS BETWEEN ADSP-2106x INTERNAL MEMORY AND EXTERNAL DEVICE
tDATRDGH
tVDATDGH
DATA (FROM
ADSP-2106x TO
EXTERNAL DRIVE)
tDATDRH
tHDATIDG
tSDATDGL
DATA (FROM
EXTERNAL DRIVE
TO ADSP-2106x)
TRANSFERS BETWEEN EXTERNAL DEVICE AND EXTERNAL MEMORY* (EXTERNAL HANDSHAKE MODE)
tDGWRL
WR
tDGWRH
tDGWRR
(EXTERNAL DEVICE
TO EXTERNAL
MEMORY)
tDGRDR
tDGRDL
RD
(EXTERNAL
MEMORY TO
EXTERNAL DEVICE)
tDRDGH
tDADGH
tDDGHA
ADDRESS
MSx, SW
*
MEMORY READ – BUS MASTER, MEMORY WRITE – BUS MASTER, AND SYNCHRONOUS READ/WRITE – BUS MASTER
TIMING SPECIFICATIONS FOR ADDR
, RD, WR, SW, MS AND ACK ALSO APPLY HERE.
31-0
3-0
Figure 20. DMA Handshake Timing
REV. C
–32–
ADI [ ADI ]
